[PATCH] D111362: [PowerPC] Add support for ROP protection for 32 bit.

[Stefan Pintilie via Phabricator via llvm-commits]

stefanp added inline comments.


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Comment at: llvm/lib/Target/PowerPC/PPCInstrInfo.td:5486
+// specified address.
+let mayLoad = 1, hasSideEffects = 1, isCodeGenOnly = 1 in {
+def HASHCHK : XForm_XD6_RA5_RB5<31, 754, (outs),
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amyk wrote:
> Just wanted to double check that `isCodeGenOnly` is intended for these, right? 
> I don't have a strong opinion either way but since they're not on the 64-bit version and since `hasSideEffects` is documented, it may not hurt to document why `isCodeGenOnly` is added here.
Sure. I can add that.
The idea is that we don't want the llvm to get confused between HASHCHK and HASHCHK8 because they are both encoded the same way. I'll add a comment with an explanation. 


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Comment at: llvm/test/CodeGen/PowerPC/ppc64-rop-protection-aix.ll:277
+;; Protected Zone. However, this restriction will be removed in an upcoming
+;; revision of the ABI.
+define dso_local zeroext i32 @spill(i32* nocapture readonly %in) #0 {
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amyk wrote:
> Would it be helpful to add a TODO to remove this comment when the next ABI revision is released?
Sure. That's a good idea. I will add that.


Repository:
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  https://reviews.llvm.org/D111362/new/

https://reviews.llvm.org/D111362