[PATCH] D113489: [AArch64][SVE] Instcombine SVE LD1/ST1 to stock LLVM IR

[Matt Devereau via Phabricator via llvm-commits]

MattDevereau added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp:718
+             m_Intrinsic<Intrinsic::aarch64_sve_ptrue>(m_Value(Predicate))))
+    return None;
+  if (!match(Predicate, m_ConstantInt<AArch64SVEPredPattern::all>()))
----------------
paulwalker-arm wrote:
> Can we use a masked load for this scenario also? As in masked_load doesn't care how the mask was constructed.
> 
> My feeling is `instCombineSVEMaskedLD1` and `instCombineSVELD1` are called in the wrong order.  It seems easier to always call  `instCombineSVEMaskedLD1` and then call `instCombineSVELD1` for the case when
> ```
> match(II.getOperand(0),
>              m_Intrinsic<Intrinsic::aarch64_sve_ptrue>(m_ConstantInt<AArch64SVEPredPattern::all>()))
> ```
> is true?
Using the match you suggested and always calling `instCombineSVEMaskedLD1` would end up instCombining and erasing `aarch64.sve.convert.from.svbool`, predicates I think? Is this ok?


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  https://reviews.llvm.org/D113489/new/

https://reviews.llvm.org/D113489