[PATCH] D113489: [AArch64][SVE] Instcombine SVE LD1/ST1 to stock LLVM IR

[Matt Devereau via Phabricator via llvm-commits]

MattDevereau created this revision.
MattDevereau added reviewers: peterwaller-arm, paulwalker-arm, bsmith, DavidTruby.
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InstCombine AArch64 LD1/ST1 to llvm.masked.load/llvm.masked.store and LD1/ST1 to load/store when a ptrue all predicate pattern operand is present.

This allows existing IR optimizations such as dead-load removal to occur.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D113489

Files:
  llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
  llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-loadstore.ll

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