[PATCH] D113448: [AMDGPU] Check for unneeded shift mask in shift PatFrags.

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/test/CodeGen/AMDGPU/constrained-shift.ll:19
+; GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GISEL-NEXT:    v_and_b32_e32 v1, 15, v1
+; GISEL-NEXT:    v_lshlrev_b16_e32 v2, v1, v0
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foad wrote:
> abinavpp wrote:
> > Do we see anything obvious in this change that's not allowing us to eliminate the `and` in global-isel for the divergent cases?
> I think a cross-regbank copy is getting in the way of matching the constant value 15. Maybe use getIConstantVRegValWithLookThrough to look through the copy?
This is another case where regbankselect or a the post regbank combiner should have materialized the constant in VGPR to begin with


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https://reviews.llvm.org/D113448