[PATCH] D113448: [AMDGPU] Check for unneeded shift mask in shift PatFrags.
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 9 02:50:35 PST 2021
foad added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp:3887
+
+ const MachineInstr *Opnd1Def =
+ getOpcodeDef(TargetOpcode::G_CONSTANT, MI.getOperand(2).getReg(), *MRI);
----------------
Could use getIConstantVRegVal here to get the APInt value directly?
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp:3887
+
+ const MachineInstr *Opnd1Def =
+ getOpcodeDef(TargetOpcode::G_CONSTANT, MI.getOperand(2).getReg(), *MRI);
----------------
foad wrote:
> Could use getIConstantVRegVal here to get the APInt value directly?
`Opnd1` is a bit confusing because it's MI.getOperand(2). Maybe call it something vague like MaskVal?
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUInstructions.td:261
+
foreach width = [16, 32, 64] in {
defvar mask = !sub(width, 1);
----------------
Maybe change this to `foreach logwidth = [4, 5, 6]` so you can put the definition of csh_mask_#logwidth inside the loop? Or maybe that's impossible because you need to refer to logwidth inside a C++ code fragment?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D113448/new/
https://reviews.llvm.org/D113448
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