[PATCH] D113173: [AsmPrinter][ORE] use correct opcode name
ChenZheng via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Nov 8 16:32:48 PST 2021
shchenz added inline comments.
================
Comment at: llvm/test/CodeGen/PowerPC/instruction-mix-remarks-BCTRL_LWZinto_toc.ll:9
; CHECK: - String: ': '
-; CHECK: - INST_bctrl
-; CHECK: ld 2,: '1'
+; CHECK: - INST_bctrl: '1'
; CHECK: - String: "\n"
----------------
fhahn wrote:
> shouldn't this be 2 instructions and the count for `tld` is missing at the moment?
>
> I am not very familiar with PPC instructions, but the description contains:
>
> ```
> This pseudo instruction consists of two instructions: bctrl without any explicit operands and lwz with two operands 2 and $src.
>
> ```
This is a known limitation for this kind of pseudo instructions for scheduling/classification, and now one more, for opcode mnemonic if we want to get the name from `getMnemonic`
```
// Two joined instructions; used to emit two adjacent instructions as one.
// The itinerary from the first instruction is used for scheduling and
// classification.
class I2 {
}
```
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D113173/new/
https://reviews.llvm.org/D113173
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