[PATCH] D77029: Fix out-of-bounds BitVector access in RegScavenger

[Matthias Braun via Phabricator via llvm-commits]

MatzeB added inline comments.


================
Comment at: llvm/lib/CodeGen/RegisterScavenging.cpp:120-134
   for (const MachineOperand &MO : MI.operands()) {
     if (MO.isRegMask()) {
-      TmpRegUnits.clear();
+      TmpRegUnits.reset();
       for (unsigned RU = 0, RUEnd = TRI->getNumRegUnits(); RU != RUEnd; ++RU) {
         for (MCRegUnitRootIterator RURI(RU, TRI); RURI.isValid(); ++RURI) {
           if (MO.clobbersPhysReg(*RURI)) {
             TmpRegUnits.set(RU);
----------------
MatzeB wrote:
> MatzeB wrote:
> > 
> Given that this appears to do nothing, let's go for this:
(this should not include the `for` line, but just the `if (MO.isRegMask())` part.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D77029/new/

https://reviews.llvm.org/D77029