[PATCH] D110831: [RISCV] Add undisturbed version of unmasked intrinsics.

[Zakk Chen via Phabricator via llvm-commits]

khchen added inline comments.
Herald added subscribers: VincentWu, luke957.


================
Comment at: llvm/include/llvm/IR/IntrinsicsRISCV.td:203
                     [NoCapture<ArgIndex<0>>, IntrReadMem]>, RISCVVIntrinsic;
+  // Input: (dest, pointer, stride, vl)
+  class RISCVSLoadTU
----------------
`// Input: (undisturbed, pointer, vl)` maybe better.


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td:478
+class RISCVVSX<bit M, bit TU, bit O, bits<3> S, bits<3> L, bits<3> IL> :
+  RISCVVLX_VSX<M, TU, O, S, L, IL>;
 
----------------
How about
```
class RISCVVSX<bit M, bit O, bits<3> S, bits<3> L, bits<3> IL> :
  RISCVVLX_VSX<M, /*TU*/ 0, O, S, L, IL>;
```


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D110831/new/

https://reviews.llvm.org/D110831