[PATCH] D99662: [AArch64] Add Machine InstCombiner patterns for FMUL indexed variant

Andrew Savonichev via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 8 04:36:49 PST 2021


asavonic updated this revision to Diff 385455.
asavonic added a comment.

- Added -verify-machineinstrs.
- Used MRI.clearKillFlags() to extend lifetime of DUP operand.
- Added update_mir_test_checks.py checks to the MIR LIT test.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D99662/new/

https://reviews.llvm.org/D99662

Files:
  llvm/include/llvm/CodeGen/MachineCombinerPattern.h
  llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
  llvm/test/CodeGen/AArch64/arm64-fma-combines.ll
  llvm/test/CodeGen/AArch64/machine-combiner-fmul-dup.mir

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