[PATCH] D112692: [RISCV] Generate pseudo instruction li
wangpc via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Nov 1 03:42:17 PDT 2021
pcwang-thead added a comment.
I have no idea why some tests about sanitizer failed.
Other than that, is there anything I haven't noticed?
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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.td:708
+def : InstAlias<"li $rd, $imm", (ADDI GPR:$rd, X0, simm12:$imm)>;
def : InstAlias<"mv $rd, $rs", (ADDI GPR:$rd, GPR:$rs, 0)>;
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jrtc27 wrote:
> Either don't bother trying to align it or add spaces to the ones below so it can be properly aligned; currently it looks weird
OK,I have removed these spaces.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D112692/new/
https://reviews.llvm.org/D112692
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