[PATCH] D113353: [RISCV] Add scheduling resources for Vector pseudo instructions.

[Hsiangkai Wang via Phabricator via llvm-commits]

HsiangKai created this revision.
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Add the scheduling resources for the V extension pseudo instructions.

Authored-by: Evandro Menezes <evandro.menezes at sifive.com>


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D113353

Files:
  llvm/lib/Target/RISCV/RISCVInstrFormats.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/lib/Target/RISCV/RISCVSchedRocket.td

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