[PATCH] D113302: [X86] Update RET/LRET instruction to use the same naming convention as IRET (PR36876). NFC

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat Nov 6 06:17:49 PDT 2021 

RKSimon updated this revision to Diff 385268.
RKSimon added a comment.
Herald added subscribers: qcolombet, MatzeB.

update tests


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D113302/new/

https://reviews.llvm.org/D113302

Files:
  llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
  llvm/lib/Target/X86/X86ExpandPseudo.cpp
  llvm/lib/Target/X86/X86FastISel.cpp
  llvm/lib/Target/X86/X86IndirectThunks.cpp
  llvm/lib/Target/X86/X86InstrControl.td
  llvm/lib/Target/X86/X86InstrInfo.cpp
  llvm/lib/Target/X86/X86LoadValueInjectionRetHardening.cpp
  llvm/lib/Target/X86/X86MCInstLower.cpp
  llvm/lib/Target/X86/X86RegisterInfo.cpp
  llvm/lib/Target/X86/X86SchedBroadwell.td
  llvm/lib/Target/X86/X86SchedHaswell.td
  llvm/lib/Target/X86/X86SchedIceLake.td
  llvm/lib/Target/X86/X86SchedSandyBridge.td
  llvm/lib/Target/X86/X86SchedSkylakeClient.td
  llvm/lib/Target/X86/X86SchedSkylakeServer.td
  llvm/lib/Target/X86/X86ScheduleAtom.td
  llvm/lib/Target/X86/X86ScheduleZnver1.td
  llvm/lib/Target/X86/X86ScheduleZnver2.td
  llvm/test/CodeGen/X86/basic-block-sections-mir-parse.mir
  llvm/test/CodeGen/X86/block-placement.mir
  llvm/test/CodeGen/X86/bug47278.mir
  llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding2.mir
  llvm/test/CodeGen/X86/dbg-value-superreg-copy.mir
  llvm/test/CodeGen/X86/evex-to-vex-compress.mir
  llvm/test/CodeGen/X86/expand-call-rvmarker.mir
  llvm/test/CodeGen/X86/expand-vr64-gr64-copy.mir
  llvm/test/CodeGen/X86/fast-regalloc-live-out-debug-values.mir
  llvm/test/CodeGen/X86/fixup-bw-copy.mir
  llvm/test/CodeGen/X86/fixup-bw-inst.mir
  llvm/test/CodeGen/X86/implicit-null-checks.mir
  llvm/test/CodeGen/X86/implicit-null-chk-reg-rewrite.mir
  llvm/test/CodeGen/X86/instr-symbols.mir
  llvm/test/CodeGen/X86/invalid-liveness.mir
  llvm/test/CodeGen/X86/leaFixup32.mir
  llvm/test/CodeGen/X86/leaFixup64.mir
  llvm/test/CodeGen/X86/machine-copy-dbgvalue.mir
  llvm/test/CodeGen/X86/machine-outliner-cfi-tail-some.mir
  llvm/test/CodeGen/X86/machine-outliner-cfi-tail.mir
  llvm/test/CodeGen/X86/optimize-compare.mir
  llvm/test/CodeGen/X86/patchpoint-verifiable.mir
  llvm/test/CodeGen/X86/phielim-undef.mir
  llvm/test/CodeGen/X86/post-ra-sched-with-debug.mir
  llvm/test/CodeGen/X86/prologue-epilogue-remarks.mir
  llvm/test/CodeGen/X86/scavenger.mir
  llvm/test/CodeGen/X86/tail-merge-after-mbp.mir
  llvm/test/CodeGen/X86/tied-depbreak.mir
  llvm/test/CodeGen/X86/twoaddr-dbg-value.mir
  llvm/test/CodeGen/X86/update-terminator.mir
  llvm/test/CodeGen/X86/win64-eh-empty-block-2.mir
  llvm/test/CodeGen/X86/xray-multiplerets-in-blocks.mir
  llvm/test/DebugInfo/MIR/InstrRef/dbg-phi-subregister-location.mir
  llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-in-ldv.mir
  llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-merging-in-ldv.mir
  llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-with-loops.mir
  llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-live-value.mir
  llvm/test/DebugInfo/MIR/InstrRef/ignore-dbg-value-list.mir
  llvm/test/DebugInfo/MIR/InstrRef/instr-ref-roundtrip.mir
  llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_instrref_tolocs.mir
  llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_recover_clobbers.mir
  llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_stackslot_subregs.mir
  llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_subreg_substitutions.mir
  llvm/test/DebugInfo/MIR/InstrRef/memory-operand-tracking.mir
  llvm/test/DebugInfo/MIR/InstrRef/no-duplicates.mir
  llvm/test/DebugInfo/MIR/InstrRef/no-metainstrs.mir
  llvm/test/DebugInfo/MIR/InstrRef/phi-coalesce-subreg.mir
  llvm/test/DebugInfo/MIR/InstrRef/phi-coalescing.mir
  llvm/test/DebugInfo/MIR/InstrRef/pick-vphi-in-shifting-loop.mir
  llvm/test/DebugInfo/MIR/InstrRef/restore-to-rsp-crash.mir
  llvm/test/DebugInfo/MIR/InstrRef/substitusions-roundtrip.mir
  llvm/test/DebugInfo/MIR/InstrRef/survives-livedebugvars.mir
  llvm/test/DebugInfo/MIR/InstrRef/x86-fixup-bw-inst-subreb.mir
  llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup-2.mir
  llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup.mir
  llvm/test/DebugInfo/MIR/X86/backup-entry-values-usage.mir
  llvm/test/DebugInfo/MIR/X86/bit-piece-dh.mir
  llvm/test/DebugInfo/MIR/X86/call-site-gnu-vs-dwarf5-attrs.mir
  llvm/test/DebugInfo/MIR/X86/clobbered-fragments.mir
  llvm/test/DebugInfo/MIR/X86/complex-entryvalue.mir
  llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg-multiple-defs.mir
  llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg.mir
  llvm/test/DebugInfo/MIR/X86/dbg-stack-value-range.mir
  llvm/test/DebugInfo/MIR/X86/dbgcall-site-copy-super-sub.mir
  llvm/test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir
  llvm/test/DebugInfo/MIR/X86/dbgcall-site-lea-interpretation.mir
  llvm/test/DebugInfo/MIR/X86/dbgcall-site-partial-describe.mir
  llvm/test/DebugInfo/MIR/X86/dbgcall-site-reference.mir
  llvm/test/DebugInfo/MIR/X86/dbgcall-site-reg-shuffle.mir
  llvm/test/DebugInfo/MIR/X86/dbgcall-site-two-fwd-reg-defs.mir
  llvm/test/DebugInfo/MIR/X86/debug-call-site-param.mir
  llvm/test/DebugInfo/MIR/X86/debug-entry-value-operation.mir
  llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-clobber.mir
  llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-join.mir
  llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-movements.mir
  llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-spillrestore.mir
  llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-movements.mir
  llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-stackptr.mir
  llvm/test/DebugInfo/MIR/X86/empty-inline.mir
  llvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param.mir
  llvm/test/DebugInfo/MIR/X86/entry-values-diamond-bbs.mir
  llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir
  llvm/test/DebugInfo/MIR/X86/kill-entry-value-after-diamond-bbs.mir
  llvm/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir
  llvm/test/DebugInfo/MIR/X86/live-debug-values-bad-transfer.mir
  llvm/test/DebugInfo/MIR/X86/live-debug-values-cutoffs.mir
  llvm/test/DebugInfo/MIR/X86/live-debug-values-entry-transfer.mir
  llvm/test/DebugInfo/MIR/X86/live-debug-values-fragments.mir
  llvm/test/DebugInfo/MIR/X86/live-debug-values-restore-collide.mir
  llvm/test/DebugInfo/MIR/X86/live-debug-values-restore.mir
  llvm/test/DebugInfo/MIR/X86/live-debug-values-spill.mir
  llvm/test/DebugInfo/MIR/X86/live-debug-values-stack-clobber.mir
  llvm/test/DebugInfo/MIR/X86/live-debug-values.mir
  llvm/test/DebugInfo/MIR/X86/livedebugvalues-ignores-metaInstructions.mir
  llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond.mir
  llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_match_clobber.mir
  llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_match_move.mir
  llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_one_clobber.mir
  llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_one_move.mir
  llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_loop.mir
  llvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb.mir
  llvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb_clobbered.mir
  llvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb_move_to_clobber.mir
  llvm/test/DebugInfo/MIR/X86/livedebugvalues_load_in_loop.mir
  llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_break.mir
  llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_break_clobbered.mir
  llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_clobbered.mir
  llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond.mir
  llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond_clobber.mir
  llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond_move.mir
  llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_early_clobber.mir
  llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_terminated.mir
  llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_two_backedge.mir
  llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_two_backedge_clobbered.mir
  llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop.mir
  llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_clobbered.mir
  llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_moved.mir
  llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_outer_moved.mir
  llvm/test/DebugInfo/MIR/X86/livedebugvalues_many_loop_heads.mir
  llvm/test/DebugInfo/MIR/X86/livedebugvars-crossbb-interval.mir
  llvm/test/DebugInfo/MIR/X86/multiple-param-dbg-value-entry.mir
  llvm/test/DebugInfo/MIR/X86/piece-entryval.mir
  llvm/test/DebugInfo/MIR/X86/propagate-entry-value-cross-bbs.mir
  llvm/test/DebugInfo/MIR/X86/remove-entry-value-from-loop.mir
  llvm/test/DebugInfo/MIR/X86/remove-redundant-dbg-vals.mir
  llvm/test/DebugInfo/MIR/X86/unreachable-block-call-site.mir
  llvm/test/DebugInfo/X86/bbjoin.ll
  llvm/test/DebugInfo/X86/dbg_entity_calc_ignores_KILL_instruction_at_return.mir
  llvm/test/DebugInfo/X86/dbg_entity_calc_ignores_KILL_instruction_still_clobbers.mir
  llvm/test/DebugInfo/X86/dbg_value_list_clobbers.mir
  llvm/test/DebugInfo/X86/dbg_value_list_emission.mir
  llvm/test/DebugInfo/X86/debug-loc-asan.mir
  llvm/test/DebugInfo/X86/debug-loc-offset.mir
  llvm/test/DebugInfo/X86/dw_op_constu.mir
  llvm/test/DebugInfo/X86/dw_op_minus.mir
  llvm/test/DebugInfo/X86/live-debug-values-constprop.mir
  llvm/test/DebugInfo/X86/location-range-inlined-xblock.mir
  llvm/test/DebugInfo/X86/location-range.mir
  llvm/test/DebugInfo/X86/pr19307.mir
  llvm/test/DebugInfo/X86/pr34545.ll
  llvm/test/DebugInfo/X86/single-location-2.mir
  llvm/test/DebugInfo/X86/single-location-inlined-param.mir
  llvm/test/DebugInfo/X86/single-location-interrupted-scope.mir
  llvm/test/DebugInfo/X86/trim-var-locs.mir
  llvm/unittests/tools/llvm-exegesis/X86/SnippetRepetitorTest.cpp

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