[PATCH] D113341: [SystemZ] Support symbolic displacements.

[Jonas Paulsson via Phabricator via llvm-commits]

jonpa added inline comments.


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Comment at: llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp:147
+  // TODO: no test yet for the shifting of the bit offset.
+
+  // Big-endian insertion of Size bytes.
----------------
IIUC, this is the place where the bit-offset should be applied, but I see another reloc kind with a bit offset that was not applied previously, and I am not sure exactly why... I could not yet find a way to test this either...


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Comment at: llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCCodeEmitter.cpp:189
+// TODO: What's the best way to do this?
+static uint32_t getFixupByteOffs(const MCInst &MI, unsigned OpNum) {
+  switch (MI.getOpcode()) {
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Still looking for a good way to find the byte offset for a displacement.

So far I have found only two categories of byte offsets:
1. The majority of these instructions seem to have the displacement at 2 bytes + 4 bit (=> starting at 20th bit).
2. MVC (and others) has a second address displacement with a 4 byte offset.
3. ...?

- It would be nice to somehow deduce the byte/bit offset from the OpNum from the MCInstrDesc, but I am not sure that's possible... 
- Using TSFlags in the instruction descriptor might be an alternative..



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Comment at: llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCCodeEmitter.cpp:201
+               SmallVectorImpl<MCFixup> &Fixups,
+               SystemZ::FixupKind Kind) const {
+  const MCOperand &MO = MI.getOperand(OpNum);
----------------
Should these displacement fixups also deal with the TLS marker like in SystemZMCCodeEmitter::getPCRelEncoding()?



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  https://reviews.llvm.org/D113341/new/

https://reviews.llvm.org/D113341