[PATCH] D109008: [AMDGPU][NFC] Refactor AMDGPUCallingConv.td

[Scott Linder via Phabricator via llvm-commits]

scott.linder updated this revision to Diff 384787.
scott.linder edited the summary of this revision.
scott.linder added a comment.

Remove misleading comment headers, strip "CSR_" prefix from regmask identifiers.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D109008/new/

https://reviews.llvm.org/D109008

Files:
  llvm/lib/Target/AMDGPU/AMDGPUCallingConv.td
  llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
  llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-abi-attribute-hints.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-implicit-args.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-non-fixed.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-indirect-call.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sibling-call.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-tail-call.ll
  llvm/test/CodeGen/AMDGPU/call-waw-waitcnt.mir
  llvm/test/CodeGen/AMDGPU/collapse-endcf2.mir
  llvm/test/CodeGen/AMDGPU/debug-value-scheduler-crash.mir
  llvm/test/CodeGen/AMDGPU/fold-operands-remove-m0-redef.mir
  llvm/test/CodeGen/AMDGPU/greedy-alloc-fail-sgpr1024-spill.mir
  llvm/test/CodeGen/AMDGPU/limit-soft-clause-reg-pressure.mir
  llvm/test/CodeGen/AMDGPU/pei-scavenge-vgpr-spill.mir
  llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir
  llvm/test/CodeGen/AMDGPU/sgpr-spill-wrong-stack-id.mir
  llvm/test/CodeGen/AMDGPU/splitkit-copy-bundle.mir
  llvm/test/CodeGen/AMDGPU/verify-gfx90a-aligned-vgprs.mir
  llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
  llvm/test/CodeGen/AMDGPU/virtregrewrite-undef-identity-copy.mir
  llvm/test/CodeGen/MIR/AMDGPU/stack-id-assert.mir

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