[PATCH] D113178: [PowerPC] use right register class for input operand of XXPERMDIs
Jinsong Ji via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 4 06:46:35 PDT 2021
jsji added inline comments.
================
Comment at: llvm/lib/Target/PowerPC/PPCInstrVSX.td:1069
let isCodeGenOnly = 1 in
- def XXPERMDIs : XX3Form_2s<60, 10, (outs vsrc:$XT), (ins vsfrc:$XA, u2imm:$DM),
+ def XXPERMDIs : XX3Form_2s<60, 10, (outs vsrc:$XT), (ins vsrc:$XA, u2imm:$DM),
"xxpermdi $XT, $XA, $XA, $DM", IIC_VecPerm, []>;
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I believe the intention was to use `XXPERMDIs` for single precision , for `vsfrc`, while `XXPERMDI` for `vsrc`.
Are we sure we are using `XXPERMDIs` correctly in D106555?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D113178/new/
https://reviews.llvm.org/D113178
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