[llvm] b4992db - [LV] Clarify uniform worklist contains instrs demanding lane 0.

[Florian Hahn via llvm-commits]

Author: Florian Hahn
Date: 2021-11-04T13:11:50+01:00
New Revision: b4992dbb21ff9159285ae0aec73f3d760344b0e5

URL: https://github.com/llvm/llvm-project/commit/b4992dbb21ff9159285ae0aec73f3d760344b0e5
DIFF: https://github.com/llvm/llvm-project/commit/b4992dbb21ff9159285ae0aec73f3d760344b0e5.diff

LOG: [LV] Clarify uniform worklist contains instrs demanding lane 0.

Added: 
    

Modified: 
    llvm/lib/Transforms/Vectorize/LoopVectorize.cpp

Removed: 
    


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diff  --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
index 1c6f252cfae98..b1c98aec6a532 100644
--- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -5379,12 +5379,14 @@ void LoopVectorizationCostModel::collectLoopUniforms(ElementCount VF) {
     return (!I || !TheLoop->contains(I));
   };
 
+  // Worklist containing uniform instructions demanding lane 0.
   SetVector<Instruction *> Worklist;
   BasicBlock *Latch = TheLoop->getLoopLatch();
 
-  // Instructions that are scalar with predication must not be considered
-  // uniform after vectorization, because that would create an erroneous
-  // replicating region where only a single instance out of VF should be formed.
+  // Add uniform instructions demanding lane 0 to the worklist. Instructions
+  // that are scalar with predication must not be considered uniform after
+  // vectorization, because that would create an erroneous replicating region
+  // where only a single instance out of VF should be formed.
   // TODO: optimize such seldom cases if found important, see PR40816.
   auto addToWorklistIfAllowed = [&](Instruction *I) -> void {
     if (isOutOfScope(I)) {