[PATCH] D113096: [X86][MS-InlineAsm] Add constraint *m for memory access w/ global var

[Kan Shengchen via Phabricator via llvm-commits]

skan marked 3 inline comments as done.
skan added inline comments.


================
Comment at: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp:1759
   // It is widely common for MS InlineAsm to use a global variable and one/two
   // registers in a mmory expression, and though unaccessible via rip/eip.
   if (IsGlobalLV && (BaseReg || IndexReg)) {
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xiangzhangllvm wrote:
> skan wrote:
> > xiangzhangllvm wrote:
> > > Let me generally tell out my understand here, (If wrong PLS correct me)
> > > Here from the comments we can see, the old code want to keep the origin symbol of global variable to let linker (relocation) handle it.  Here you describe it with a  pointer (with decl), it change to form of $ID <--> (decl), So which need constrain it with "*m". But if the pointer can not be access from BaseReg(Rip) + Index(Ip) how do you descript the pointer you generate out ?
> > > 
> > I think you may misunderstand this code.
> > 
> > This code handles the memory that can not be represented by Disp(RIP) b/c there is already a BaseReg or IndexReg there.
> > 
> > Before this patch, the memory is represented like `arr[edx*4]` and there is no identifer bound to it.  And after this patch, we bind the memory to identifer arr.
> Yes, that is why I mean t change ( arr[edx*4] ) to form of $ID <--> (decl). So what the problem if we let the old form ( arr[edx*4] ) being ?
Then the definition of arr would be deleted by C Front end, and result in "undefined reference to xxx" issue during link stage.


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  https://reviews.llvm.org/D113096/new/

https://reviews.llvm.org/D113096