[PATCH] D113123: [TwoAddressInstruction] Fix handling of operands tied to early-clobbers

[Jay Foad via Phabricator via llvm-commits]

foad created this revision.
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When updating live intervals (with -early-live-intervals), fix handling
of live ranges that were previously tied to an early-clobber def but no
longer are.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D113123

Files:
  llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
  llvm/test/CodeGen/RISCV/rvv/vwadd.w-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vwadd.w-rv64.ll


Index: llvm/test/CodeGen/RISCV/rvv/vwadd.w-rv64.ll
===================================================================
--- llvm/test/CodeGen/RISCV/rvv/vwadd.w-rv64.ll
+++ llvm/test/CodeGen/RISCV/rvv/vwadd.w-rv64.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=riscv64 -mattr=+experimental-v -verify-machineinstrs \
-; RUN:   < %s | FileCheck %s
+; RUN: llc -mtriple=riscv64 -mattr=+experimental-v -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -mtriple=riscv64 -mattr=+experimental-v -verify-machineinstrs -early-live-intervals < %s | FileCheck %s
 declare <vscale x 1 x i16> @llvm.riscv.vwadd.w.nxv1i16.nxv1i8(
   <vscale x 1 x i16>,
   <vscale x 1 x i8>,
Index: llvm/test/CodeGen/RISCV/rvv/vwadd.w-rv32.ll
===================================================================
--- llvm/test/CodeGen/RISCV/rvv/vwadd.w-rv32.ll
+++ llvm/test/CodeGen/RISCV/rvv/vwadd.w-rv32.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=riscv32 -mattr=+experimental-v -verify-machineinstrs \
-; RUN:   < %s | FileCheck %s
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-v -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-v -verify-machineinstrs -early-live-intervals < %s | FileCheck %s
 declare <vscale x 1 x i16> @llvm.riscv.vwadd.w.nxv1i16.nxv1i8(
   <vscale x 1 x i16>,
   <vscale x 1 x i8>,
Index: llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
===================================================================
--- llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
+++ llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
@@ -705,8 +705,17 @@
   // exactly the same effect on liveness as the old instruction. This is much
   // more efficient than calling repairIntervalsInRange.
   bool SingleInst = std::next(MIS.begin(), 2) == MIS.end();
-  if (LIS && SingleInst)
-    LIS->ReplaceMachineInstrInMaps(*mi, *NewMI);
+  if (LIS && SingleInst) {
+    SlotIndex Idx = LIS->ReplaceMachineInstrInMaps(*mi, *NewMI);
+
+    // RegB was tied to RegA. If RegA is early-clobber then the live range of
+    // RegB would have ended at an early-clobber slot, but now they are not tied
+    // we need to update it to the normal register slot.
+    LiveInterval &LI = LIS->getInterval(RegB);
+    LiveRange::Segment *S = LI.getSegmentContaining(Idx);
+    if (S->end == Idx.getRegSlot(true))
+      S->end = Idx.getRegSlot();
+  }
 
   SmallVector<Register> OrigRegs;
   if (LIS && !SingleInst) {


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