[PATCH] D112285: [PowerPC] PPC backend optimization to lower int_ppc_tdw/int_ppc_tw intrinsics to TDI/TWI machine instructions

Wed Nov 3 07:54:33 PDT 2021

NeHuang added inline comments.

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Comment at: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap-64bit-only.ll:131
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    tdi 3, 3, 32767
+; CHECK-NEXT:    blr
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amyk wrote:
> amyk wrote:
> > nemanjai wrote:
> > > Can we add `-ppc-asm-full-reg-names` to the RUN lines so it is more clear which operand is a register and which is an immediate. This works on AIX now since https://reviews.llvm.org/D94282 landed.
> > Maybe it would be good to pre-commit the change with `-ppc-asm-full-reg-names` added to the run lines so then this patch can only contain the pertinent `td`/`tdi`/`tw`/`twi` changes.
> I meant, maybe it is a better idea to commit the test cases with `-ppc-asm-full-reg-names` first, so then this revision does not contain the additional updates of adding the registers in places that is not affected by your patch. However, perhaps if Nemanja thinks adding the option to this patch is OK, then that's fine with me, too. 
Good catch. Let me rebase this patch with ToT. The NFC patch was committed at 40cad47fd82ecaf253ba9b11fcd34f67dd557e9d.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D112285/new/

https://reviews.llvm.org/D112285