[llvm] e515d3a - [LV] Add test case from PR51794 for over-eager truncation.

[Florian Hahn via llvm-commits]

Author: Florian Hahn
Date: 2021-11-02T22:15:09+01:00
New Revision: e515d3a433be10536427c34ecfa3bf75e9c68390

URL: https://github.com/llvm/llvm-project/commit/e515d3a433be10536427c34ecfa3bf75e9c68390
DIFF: https://github.com/llvm/llvm-project/commit/e515d3a433be10536427c34ecfa3bf75e9c68390.diff

LOG: [LV] Add test case from PR51794 for over-eager truncation.

This patch adds a test case for PR51794 where reductions are performed
on types that are too small.

Added: 
    

Modified: 
    llvm/test/Transforms/LoopVectorize/reduction-small-size.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/LoopVectorize/reduction-small-size.ll b/llvm/test/Transforms/LoopVectorize/reduction-small-size.ll
index 64aebe45e0cb..7515fa70b6e3 100644
--- a/llvm/test/Transforms/LoopVectorize/reduction-small-size.ll
+++ b/llvm/test/Transforms/LoopVectorize/reduction-small-size.ll
@@ -71,3 +71,37 @@ for.end:
   %tmp1 = phi i32 [ %r.next, %for.body ]
   ret i32 %tmp1
 }
+
+define i32 @pr51794_signed_negative(i16 %iv.start, i32 %xor.start) {
+; CHECK-LABEL: define {{.*}} @pr51794_signed_negative
+; CHECK:   [[XOR_START:%.+]] = insertelement <4 x i32> zeroinitializer, i32 %xor.start, i32 0
+; CHECK-LABEL: vector.body:
+; CHECK:         [[XOR_RED:%.+]] = phi <4 x i32> [ [[XOR_START]], %vector.ph ], [ [[XOR_SEXT:%.+]], %vector.body ]
+; CHECK:         [[AND:%.+]] = and <4 x i32> [[XOR_RED]], <i32 1, i32 1, i32 1, i32 1>
+; CHECK-NEXT:    [[XOR:%.+]] = xor <4 x i32> [[AND]], <i32 -1, i32 -1, i32 -1, i32 -1>
+; CHECK:         [[XOR_TRUNC:%.+]] = trunc <4 x i32> [[XOR]] to <4 x i1>
+; CHECK-NEXT:    [[XOR_SEXT]] = sext <4 x i1> [[XOR_TRUNC]] to <4 x i32>
+;
+; CHECK-LABEL: middle.block:
+; CHECK-NEXT:   [[RES_TRUNC:%.+]] = trunc <4 x i32> [[XOR_SEXT]] to <4 x i1>
+; CHECK-NEXT:   [[RES_RED:%.+]]  = call i1 @llvm.vector.reduce.xor.v4i1(<4 x i1> [[RES_TRUNC]])
+; CHECK-NEXT:   sext i1 [[RES_RED]] to i32
+;
+entry:
+  br label %loop
+
+loop:
+  %xor.red = phi i32 [ %xor.start, %entry ], [ %xor, %loop ]
+  %iv = phi i16 [ %iv.start, %entry ], [ %iv.next, %loop ]
+  %iv.next = add i16 %iv, -1
+  %and = and i32 %xor.red, 1
+  %xor = xor i32 %and, -1
+  %tobool.not = icmp eq i16 %iv.next, 0
+  br i1 %tobool.not, label %exit, label %loop
+
+exit:
+  %xor.lcssa = phi i32 [ %xor, %loop ]
+  ret i32 %xor.lcssa
+}
+
+