[llvm] 7011511 - [X86][AVX] Add PR51226 test case
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 2 11:57:32 PDT 2021
Author: Simon Pilgrim
Date: 2021-11-02T18:56:39Z
New Revision: 7011511f297fc85cda9fb8d6953df99641610fed
URL: https://github.com/llvm/llvm-project/commit/7011511f297fc85cda9fb8d6953df99641610fed
DIFF: https://github.com/llvm/llvm-project/commit/7011511f297fc85cda9fb8d6953df99641610fed.diff
LOG: [X86][AVX] Add PR51226 test case
Added:
Modified:
llvm/test/CodeGen/X86/subvector-broadcast.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/subvector-broadcast.ll b/llvm/test/CodeGen/X86/subvector-broadcast.ll
index bd807c9e76c6..bbf413a91bad 100644
--- a/llvm/test/CodeGen/X86/subvector-broadcast.ll
+++ b/llvm/test/CodeGen/X86/subvector-broadcast.ll
@@ -1752,3 +1752,80 @@ define <8 x double> @broadcast_v8f64_v2f64_0uuu0101(<2 x double>* %vp) {
%res = shufflevector <2 x double> %vec, <2 x double> undef, <8 x i32> <i32 0, i32 undef, i32 undef, i32 undef, i32 0, i32 1, i32 0, i32 1>
ret <8 x double> %res
}
+
+define void @PR51226() {
+; X86-AVX1-LABEL: PR51226:
+; X86-AVX1: # %bb.0:
+; X86-AVX1-NEXT: vpmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
+; X86-AVX1-NEXT: vpslld $16, %xmm0, %xmm0
+; X86-AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X86-AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; X86-AVX1-NEXT: vminps %ymm1, %ymm0, %ymm0
+; X86-AVX1-NEXT: vmovups %ymm0, (%eax)
+; X86-AVX1-NEXT: vzeroupper
+; X86-AVX1-NEXT: retl
+;
+; X86-AVX2-LABEL: PR51226:
+; X86-AVX2: # %bb.0:
+; X86-AVX2-NEXT: vpmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
+; X86-AVX2-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
+; X86-AVX2-NEXT: vpslld $16, %ymm0, %ymm0
+; X86-AVX2-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; X86-AVX2-NEXT: vminps %ymm1, %ymm0, %ymm0
+; X86-AVX2-NEXT: vmovups %ymm0, (%eax)
+; X86-AVX2-NEXT: vzeroupper
+; X86-AVX2-NEXT: retl
+;
+; X86-AVX512-LABEL: PR51226:
+; X86-AVX512: # %bb.0:
+; X86-AVX512-NEXT: vpmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
+; X86-AVX512-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
+; X86-AVX512-NEXT: vpslld $16, %ymm0, %ymm0
+; X86-AVX512-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; X86-AVX512-NEXT: vminps %ymm1, %ymm0, %ymm0
+; X86-AVX512-NEXT: vmovups %ymm0, (%eax)
+; X86-AVX512-NEXT: vzeroupper
+; X86-AVX512-NEXT: retl
+;
+; X64-AVX1-LABEL: PR51226:
+; X64-AVX1: # %bb.0:
+; X64-AVX1-NEXT: vpmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
+; X64-AVX1-NEXT: vpslld $16, %xmm0, %xmm0
+; X64-AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X64-AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; X64-AVX1-NEXT: vminps %ymm1, %ymm0, %ymm0
+; X64-AVX1-NEXT: vmovups %ymm0, (%rax)
+; X64-AVX1-NEXT: vzeroupper
+; X64-AVX1-NEXT: retq
+;
+; X64-AVX2-LABEL: PR51226:
+; X64-AVX2: # %bb.0:
+; X64-AVX2-NEXT: vpmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
+; X64-AVX2-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
+; X64-AVX2-NEXT: vpslld $16, %ymm0, %ymm0
+; X64-AVX2-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; X64-AVX2-NEXT: vminps %ymm1, %ymm0, %ymm0
+; X64-AVX2-NEXT: vmovups %ymm0, (%rax)
+; X64-AVX2-NEXT: vzeroupper
+; X64-AVX2-NEXT: retq
+;
+; X64-AVX512-LABEL: PR51226:
+; X64-AVX512: # %bb.0:
+; X64-AVX512-NEXT: vpmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
+; X64-AVX512-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
+; X64-AVX512-NEXT: vpslld $16, %ymm0, %ymm0
+; X64-AVX512-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; X64-AVX512-NEXT: vminps %ymm1, %ymm0, %ymm0
+; X64-AVX512-NEXT: vmovups %ymm0, (%rax)
+; X64-AVX512-NEXT: vzeroupper
+; X64-AVX512-NEXT: retq
+ %i = load <4 x i16>, <4 x i16>* undef, align 8
+ %i1 = zext <4 x i16> %i to <4 x i32>
+ %i2 = shl nuw <4 x i32> %i1, <i32 16, i32 16, i32 16, i32 16>
+ %i3 = bitcast <4 x i32> %i2 to <4 x float>
+ %shuffle99 = shufflevector <4 x float> %i3, <4 x float> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
+ %i4 = fcmp reassoc nsz contract ogt <8 x float> zeroinitializer, %shuffle99
+ %i5 = select <8 x i1> %i4, <8 x float> %shuffle99, <8 x float> zeroinitializer
+ store <8 x float> %i5, <8 x float>* undef, align 16
+ ret void
+}
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