[llvm] 9951d43 - [Hexagon] Add machine verification to some tests

[Jay Foad via llvm-commits]

Author: Jay Foad
Date: 2021-11-02T15:41:30Z
New Revision: 9951d437d30eb7f998e437eb80fd12024aa4d285

URL: https://github.com/llvm/llvm-project/commit/9951d437d30eb7f998e437eb80fd12024aa4d285
DIFF: https://github.com/llvm/llvm-project/commit/9951d437d30eb7f998e437eb80fd12024aa4d285.diff

LOG: [Hexagon] Add machine verification to some tests

Added: 
    

Modified: 
    llvm/test/CodeGen/Hexagon/autohvx/isel-concat-vectors-bool.ll
    llvm/test/CodeGen/Hexagon/autohvx/isel-const-splat-bitcast.ll
    llvm/test/CodeGen/Hexagon/bit-extract-off.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/Hexagon/autohvx/isel-concat-vectors-bool.ll b/llvm/test/CodeGen/Hexagon/autohvx/isel-concat-vectors-bool.ll
index 1721c996fdb0a..4230bf1b41072 100644
--- a/llvm/test/CodeGen/Hexagon/autohvx/isel-concat-vectors-bool.ll
+++ b/llvm/test/CodeGen/Hexagon/autohvx/isel-concat-vectors-bool.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=hexagon < %s | FileCheck %s
+; RUN: llc -march=hexagon -verify-machineinstrs < %s | FileCheck %s
 
 ; Check for successful compilation.
 ; CHECK: sfcmp

diff  --git a/llvm/test/CodeGen/Hexagon/autohvx/isel-const-splat-bitcast.ll b/llvm/test/CodeGen/Hexagon/autohvx/isel-const-splat-bitcast.ll
index f446b63bf5353..4afc60b1d451d 100644
--- a/llvm/test/CodeGen/Hexagon/autohvx/isel-const-splat-bitcast.ll
+++ b/llvm/test/CodeGen/Hexagon/autohvx/isel-const-splat-bitcast.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=hexagon < %s | FileCheck %s
+; RUN: llc -march=hexagon -verify-machineinstrs < %s | FileCheck %s
 
 ; The generation of a constant vector in the selection step resulted in
 ; a VSPLAT, which, deeper in the expression tree had an unrelated BITCAST.

diff  --git a/llvm/test/CodeGen/Hexagon/bit-extract-off.ll b/llvm/test/CodeGen/Hexagon/bit-extract-off.ll
index d696800671acd..032fb806e3d77 100644
--- a/llvm/test/CodeGen/Hexagon/bit-extract-off.ll
+++ b/llvm/test/CodeGen/Hexagon/bit-extract-off.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=hexagon < %s | FileCheck %s
+; RUN: llc -march=hexagon -verify-machineinstrs < %s | FileCheck %s
 ; CHECK: extractu(r1,#31,#0)
 
 ; In the IR this was an extract of 31 bits starting at position 32 in r1:0.