[llvm] dd000e6 - [Test] Regenerate IndVars test's checks
Dmitry Makogon via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 2 08:04:52 PDT 2021
Author: Dmitry Makogon
Date: 2021-11-02T22:03:58+07:00
New Revision: dd000e67f0cafe90cf6d96db96c2db49a44c90fb
URL: https://github.com/llvm/llvm-project/commit/dd000e67f0cafe90cf6d96db96c2db49a44c90fb
DIFF: https://github.com/llvm/llvm-project/commit/dd000e67f0cafe90cf6d96db96c2db49a44c90fb.diff
LOG: [Test] Regenerate IndVars test's checks
This just regenerates a certain IndVars test's checks.
Added:
Modified:
llvm/test/Transforms/IndVarSimplify/X86/pr27133.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/IndVarSimplify/X86/pr27133.ll b/llvm/test/Transforms/IndVarSimplify/X86/pr27133.ll
index 1262407ea826b..1a3f6cd6ab9de 100644
--- a/llvm/test/Transforms/IndVarSimplify/X86/pr27133.ll
+++ b/llvm/test/Transforms/IndVarSimplify/X86/pr27133.ll
@@ -1,23 +1,41 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -indvars -S < %s | FileCheck %s
target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-windows-msvc18.0.0"
define i32 @fn2() personality i32 (...)* @__CxxFrameHandler3 {
+; CHECK-LABEL: @fn2(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[FOR_COND:%.*]]
+; CHECK: for.cond:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ 0, [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[C_0:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_INC]] ], [ 0, [[ENTRY]] ]
+; CHECK-NEXT: invoke void @fn1(i64 [[INDVARS_IV]])
+; CHECK-NEXT: to label [[FOR_INC]] unwind label [[CATCH_DISPATCH:%.*]]
+; CHECK: catch.dispatch:
+; CHECK-NEXT: [[C_0_LCSSA:%.*]] = phi i32 [ [[C_0]], [[FOR_COND]] ]
+; CHECK-NEXT: [[TMP0:%.*]] = catchswitch within none [label %catch] unwind to caller
+; CHECK: catch:
+; CHECK-NEXT: [[TMP1:%.*]] = catchpad within [[TMP0]] [i8* null, i32 64, i8* null]
+; CHECK-NEXT: catchret from [[TMP1]] to label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: ret i32 [[C_0_LCSSA]]
+; CHECK: for.inc:
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[C_0]], 1
+; CHECK-NEXT: br label [[FOR_COND]]
+;
entry:
br label %for.cond
for.cond: ; preds = %for.inc, %entry
%c.0 = phi i32 [ %inc, %for.inc ], [ 0, %entry ]
-; CHECK: %[[WIDE:.*]] = phi i64
-; CHECK: %[[NORM:.*]] = phi i32
-; CHECK: invoke void @fn1(i64 %[[WIDE]])
%idxprom = sext i32 %c.0 to i64
invoke void @fn1(i64 %idxprom)
- to label %for.inc unwind label %catch.dispatch
+ to label %for.inc unwind label %catch.dispatch
catch.dispatch: ; preds = %for.cond
%c.0.lcssa = phi i32 [ %c.0, %for.cond ]
-; CHECK: %[[LCSSA:.*]] = phi i32 [ %[[NORM]],
%0 = catchswitch within none [label %catch] unwind to caller
catch: ; preds = %catch.dispatch
@@ -25,7 +43,6 @@ catch: ; preds = %catch.dispatch
catchret from %1 to label %exit
exit:
-; CHECK: ret i32 %[[LCSSA]]
ret i32 %c.0.lcssa
for.inc: ; preds = %for.cond
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