[llvm] 6fb41c3 - [LangRef][VP] Correct mask type in vp.slice documentation

[Fraser Cormack via llvm-commits]

Author: Fraser Cormack
Date: 2021-11-02T14:48:23Z
New Revision: 6fb41c3deaed11ffdcad80aa917b7424f6ecebd7

URL: https://github.com/llvm/llvm-project/commit/6fb41c3deaed11ffdcad80aa917b7424f6ecebd7
DIFF: https://github.com/llvm/llvm-project/commit/6fb41c3deaed11ffdcad80aa917b7424f6ecebd7.diff

LOG: [LangRef][VP] Correct mask type in vp.slice documentation

The mask type for the llvm.experimental.vp.splice intrinsics must have
the same number of elements as the result type.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D112924

Added: 
    

Modified: 
    llvm/docs/LangRef.rst

Removed: 
    


################################################################################
diff  --git a/llvm/docs/LangRef.rst b/llvm/docs/LangRef.rst
index 601911d1e035d..0986193b32fb3 100644
--- a/llvm/docs/LangRef.rst
+++ b/llvm/docs/LangRef.rst
@@ -19558,7 +19558,7 @@ This is an overloaded intrinsic.
 ::
 
       declare <2 x double> @llvm.experimental.vp.splice.v2f64(<2 x double> %vec1, <2 x double> %vec2, i32 %imm, <2 x i1> %mask, i32 %evl1, i32 %evl2)
-      declare <vscale x 4 x i32> @llvm.experimental.vp.splice.nxv4i32(<vscale x 4 x i32> %vec1, <vscale x 4 x i32> %vec2, i32 %imm, <2 x i1> %mask i32 %evl1, i32 %evl2)
+      declare <vscale x 4 x i32> @llvm.experimental.vp.splice.nxv4i32(<vscale x 4 x i32> %vec1, <vscale x 4 x i32> %vec2, i32 %imm, <vscale x 4 x i1> %mask, i32 %evl1, i32 %evl2)
 
 Overview:
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