[PATCH] D111141: [RISCV] Optimize (add (mul r, c0), c1)

Alex Bradbury via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 2 07:53:10 PDT 2021


asb added a comment.
Herald added subscribers: VincentWu, luke957.

I've suggested a slight tweak to the explanatory comments.



================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:6404
+// if c1/c0 and c1%c0 are simm12, while c1 is not. A special corner case
+// should also be excluded is when c0*(c1/c0) is simm12, which will lead
+// to an infinite loop in DAGCombine.
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"A special corner case that should be excluded is when ..., which will lead to an infinite loop in DAGCombine if transformed." would read more clearly (same for other instances below).


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https://reviews.llvm.org/D111141



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