[llvm] 6bdb61c - [CodeGen] Use make_early_inc_range (NFC)
Kazu Hirata via llvm-commits
llvm-commits at lists.llvm.org
Mon Nov 1 22:39:00 PDT 2021
Author: Kazu Hirata
Date: 2021-11-01T22:38:49-07:00
New Revision: 6bdb61c58a55a31f57e65804cc3477f94b0e53f4
URL: https://github.com/llvm/llvm-project/commit/6bdb61c58a55a31f57e65804cc3477f94b0e53f4
DIFF: https://github.com/llvm/llvm-project/commit/6bdb61c58a55a31f57e65804cc3477f94b0e53f4.diff
LOG: [CodeGen] Use make_early_inc_range (NFC)
Added:
Modified:
llvm/lib/CodeGen/DeadMachineInstructionElim.cpp
llvm/lib/CodeGen/GCRootLowering.cpp
llvm/lib/CodeGen/GlobalISel/Combiner.cpp
llvm/lib/CodeGen/LiveDebugVariables.cpp
llvm/lib/CodeGen/ModuloSchedule.cpp
llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
llvm/lib/CodeGen/RegisterCoalescer.cpp
llvm/lib/CodeGen/SafeStack.cpp
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/DeadMachineInstructionElim.cpp b/llvm/lib/CodeGen/DeadMachineInstructionElim.cpp
index 6e7db95b5c2a0..c6c0b79cd7e78 100644
--- a/llvm/lib/CodeGen/DeadMachineInstructionElim.cpp
+++ b/llvm/lib/CodeGen/DeadMachineInstructionElim.cpp
@@ -138,26 +138,22 @@ bool DeadMachineInstructionElim::eliminateDeadMI(MachineFunction &MF) {
// Now scan the instructions and delete dead ones, tracking physreg
// liveness as we go.
- for (MachineBasicBlock::reverse_iterator MII = MBB->rbegin(),
- MIE = MBB->rend();
- MII != MIE;) {
- MachineInstr *MI = &*MII++;
-
+ for (MachineInstr &MI : llvm::make_early_inc_range(llvm::reverse(*MBB))) {
// If the instruction is dead, delete it!
- if (isDead(MI)) {
- LLVM_DEBUG(dbgs() << "DeadMachineInstructionElim: DELETING: " << *MI);
+ if (isDead(&MI)) {
+ LLVM_DEBUG(dbgs() << "DeadMachineInstructionElim: DELETING: " << MI);
// It is possible that some DBG_VALUE instructions refer to this
// instruction. They get marked as undef and will be deleted
// in the live debug variable analysis.
- MI->eraseFromParentAndMarkDBGValuesForRemoval();
+ MI.eraseFromParentAndMarkDBGValuesForRemoval();
AnyChanges = true;
++NumDeletes;
continue;
}
// Record the physreg defs.
- for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
- const MachineOperand &MO = MI->getOperand(i);
+ for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
+ const MachineOperand &MO = MI.getOperand(i);
if (MO.isReg() && MO.isDef()) {
Register Reg = MO.getReg();
if (Register::isPhysicalRegister(Reg)) {
@@ -175,8 +171,8 @@ bool DeadMachineInstructionElim::eliminateDeadMI(MachineFunction &MF) {
}
// Record the physreg uses, after the defs, in case a physreg is
// both defined and used in the same instruction.
- for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
- const MachineOperand &MO = MI->getOperand(i);
+ for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
+ const MachineOperand &MO = MI.getOperand(i);
if (MO.isReg() && MO.isUse()) {
Register Reg = MO.getReg();
if (Register::isPhysicalRegister(Reg)) {
diff --git a/llvm/lib/CodeGen/GCRootLowering.cpp b/llvm/lib/CodeGen/GCRootLowering.cpp
index 58269e172c573..a46d197553573 100644
--- a/llvm/lib/CodeGen/GCRootLowering.cpp
+++ b/llvm/lib/CodeGen/GCRootLowering.cpp
@@ -193,8 +193,8 @@ bool LowerIntrinsics::DoLowering(Function &F, GCStrategy &S) {
bool MadeChange = false;
for (BasicBlock &BB : F)
- for (BasicBlock::iterator II = BB.begin(), E = BB.end(); II != E;) {
- IntrinsicInst *CI = dyn_cast<IntrinsicInst>(II++);
+ for (Instruction &I : llvm::make_early_inc_range(BB)) {
+ IntrinsicInst *CI = dyn_cast<IntrinsicInst>(&I);
if (!CI)
continue;
diff --git a/llvm/lib/CodeGen/GlobalISel/Combiner.cpp b/llvm/lib/CodeGen/GlobalISel/Combiner.cpp
index 6f103bca6892f..381c6df5c97ad 100644
--- a/llvm/lib/CodeGen/GlobalISel/Combiner.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/Combiner.cpp
@@ -130,16 +130,15 @@ bool Combiner::combineMachineInstrs(MachineFunction &MF,
WrapperObserver.addObserver(CSEInfo);
RAIIDelegateInstaller DelInstall(MF, &WrapperObserver);
for (MachineBasicBlock *MBB : post_order(&MF)) {
- for (auto MII = MBB->rbegin(), MIE = MBB->rend(); MII != MIE;) {
- MachineInstr *CurMI = &*MII;
- ++MII;
+ for (MachineInstr &CurMI :
+ llvm::make_early_inc_range(llvm::reverse(*MBB))) {
// Erase dead insts before even adding to the list.
- if (isTriviallyDead(*CurMI, *MRI)) {
- LLVM_DEBUG(dbgs() << *CurMI << "Is dead; erasing.\n");
- CurMI->eraseFromParentAndMarkDBGValuesForRemoval();
+ if (isTriviallyDead(CurMI, *MRI)) {
+ LLVM_DEBUG(dbgs() << CurMI << "Is dead; erasing.\n");
+ CurMI.eraseFromParentAndMarkDBGValuesForRemoval();
continue;
}
- WorkList.deferred_insert(CurMI);
+ WorkList.deferred_insert(&CurMI);
}
}
WorkList.finalize();
diff --git a/llvm/lib/CodeGen/LiveDebugVariables.cpp b/llvm/lib/CodeGen/LiveDebugVariables.cpp
index c929c1dfc0daf..dcd546f9c6dbe 100644
--- a/llvm/lib/CodeGen/LiveDebugVariables.cpp
+++ b/llvm/lib/CodeGen/LiveDebugVariables.cpp
@@ -1294,13 +1294,9 @@ bool LDVImpl::runOnMachineFunction(MachineFunction &mf, bool InstrRef) {
static void removeDebugInstrs(MachineFunction &mf) {
for (MachineBasicBlock &MBB : mf) {
- for (auto MBBI = MBB.begin(), MBBE = MBB.end(); MBBI != MBBE; ) {
- if (!MBBI->isDebugInstr()) {
- ++MBBI;
- continue;
- }
- MBBI = MBB.erase(MBBI);
- }
+ for (MachineInstr &MI : llvm::make_early_inc_range(MBB))
+ if (MI.isDebugInstr())
+ MBB.erase(&MI);
}
}
diff --git a/llvm/lib/CodeGen/ModuloSchedule.cpp b/llvm/lib/CodeGen/ModuloSchedule.cpp
index 120ecd7ae0595..750097d9a91d6 100644
--- a/llvm/lib/CodeGen/ModuloSchedule.cpp
+++ b/llvm/lib/CodeGen/ModuloSchedule.cpp
@@ -1617,32 +1617,32 @@ void PeelingModuloScheduleExpander::moveStageBetweenBlocks(
MachineBasicBlock *DestBB, MachineBasicBlock *SourceBB, unsigned Stage) {
auto InsertPt = DestBB->getFirstNonPHI();
DenseMap<Register, Register> Remaps;
- for (auto I = SourceBB->getFirstNonPHI(); I != SourceBB->end();) {
- MachineInstr *MI = &*I++;
- if (MI->isPHI()) {
+ for (MachineInstr &MI : llvm::make_early_inc_range(
+ llvm::make_range(SourceBB->getFirstNonPHI(), SourceBB->end()))) {
+ if (MI.isPHI()) {
// This is an illegal PHI. If we move any instructions using an illegal
// PHI, we need to create a legal Phi.
- if (getStage(MI) != Stage) {
+ if (getStage(&MI) != Stage) {
// The legal Phi is not necessary if the illegal phi's stage
// is being moved.
- Register PhiR = MI->getOperand(0).getReg();
+ Register PhiR = MI.getOperand(0).getReg();
auto RC = MRI.getRegClass(PhiR);
Register NR = MRI.createVirtualRegister(RC);
MachineInstr *NI = BuildMI(*DestBB, DestBB->getFirstNonPHI(),
DebugLoc(), TII->get(TargetOpcode::PHI), NR)
.addReg(PhiR)
.addMBB(SourceBB);
- BlockMIs[{DestBB, CanonicalMIs[MI]}] = NI;
- CanonicalMIs[NI] = CanonicalMIs[MI];
+ BlockMIs[{DestBB, CanonicalMIs[&MI]}] = NI;
+ CanonicalMIs[NI] = CanonicalMIs[&MI];
Remaps[PhiR] = NR;
}
}
- if (getStage(MI) != Stage)
+ if (getStage(&MI) != Stage)
continue;
- MI->removeFromParent();
- DestBB->insert(InsertPt, MI);
- auto *KernelMI = CanonicalMIs[MI];
- BlockMIs[{DestBB, KernelMI}] = MI;
+ MI.removeFromParent();
+ DestBB->insert(InsertPt, &MI);
+ auto *KernelMI = CanonicalMIs[&MI];
+ BlockMIs[{DestBB, KernelMI}] = &MI;
BlockMIs.erase({SourceBB, KernelMI});
}
SmallVector<MachineInstr *, 4> PhiToDelete;
diff --git a/llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp b/llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
index 80c38f3ec341d..9547fe6f93de5 100644
--- a/llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
+++ b/llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
@@ -36,9 +36,8 @@ static bool lowerLoadRelative(Function &F) {
Type *Int32PtrTy = Int32Ty->getPointerTo();
Type *Int8Ty = Type::getInt8Ty(F.getContext());
- for (auto I = F.use_begin(), E = F.use_end(); I != E;) {
- auto CI = dyn_cast<CallInst>(I->getUser());
- ++I;
+ for (Use &U : llvm::make_early_inc_range(F.uses())) {
+ auto CI = dyn_cast<CallInst>(U.getUser());
if (!CI || CI->getCalledOperand() != &F)
continue;
diff --git a/llvm/lib/CodeGen/RegisterCoalescer.cpp b/llvm/lib/CodeGen/RegisterCoalescer.cpp
index 582ad35f8da95..f20d47a580f7c 100644
--- a/llvm/lib/CodeGen/RegisterCoalescer.cpp
+++ b/llvm/lib/CodeGen/RegisterCoalescer.cpp
@@ -1573,9 +1573,8 @@ bool RegisterCoalescer::reMaterializeTrivialDef(const CoalescerPair &CP,
// If the virtual SrcReg is completely eliminated, update all DBG_VALUEs
// to describe DstReg instead.
if (MRI->use_nodbg_empty(SrcReg)) {
- for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(SrcReg);
- UI != MRI->use_end();) {
- MachineOperand &UseMO = *UI++;
+ for (MachineOperand &UseMO :
+ llvm::make_early_inc_range(MRI->use_operands(SrcReg))) {
MachineInstr *UseMI = UseMO.getParent();
if (UseMI->isDebugInstr()) {
if (Register::isPhysicalRegister(DstReg))
diff --git a/llvm/lib/CodeGen/SafeStack.cpp b/llvm/lib/CodeGen/SafeStack.cpp
index 4197424e163ff..50d9d64bfcfda 100644
--- a/llvm/lib/CodeGen/SafeStack.cpp
+++ b/llvm/lib/CodeGen/SafeStack.cpp
@@ -702,9 +702,8 @@ void SafeStack::moveDynamicAllocasToUnsafeStack(
if (!DynamicAllocas.empty()) {
// Now go through the instructions again, replacing stacksave/stackrestore.
- for (inst_iterator It = inst_begin(&F), Ie = inst_end(&F); It != Ie;) {
- Instruction *I = &*(It++);
- auto II = dyn_cast<IntrinsicInst>(I);
+ for (Instruction &I : llvm::make_early_inc_range(instructions(&F))) {
+ auto *II = dyn_cast<IntrinsicInst>(&I);
if (!II)
continue;
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