[PATCH] D112619: [NFC][LoopVectorize] Add test for tail-folding loop with conditional uniform load

[David Sherwood via Phabricator via llvm-commits]

david-arm added inline comments.


================
Comment at: llvm/test/Transforms/LoopVectorize/AArch64/tail-fold-uniform-memops.ll:1
+; RUN: opt -loop-vectorize -scalable-vectorization=off -force-vector-width=4 -prefer-predicate-over-epilogue=predicate-dont-vectorize -S < %s 2>&1 | FileCheck %s
+
----------------
fhahn wrote:
> you are not checking any debug output, right? So there should be no need for `2>&1`.
Hi @fhahn, good point! I'll remove it before I merge if that's ok?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D112619/new/

https://reviews.llvm.org/D112619