[PATCH] D112619: [NFC][LoopVectorize] Add test for tail-folding loop with conditional uniform load

[Florian Hahn via Phabricator via llvm-commits]

fhahn added inline comments.


================
Comment at: llvm/test/Transforms/LoopVectorize/AArch64/tail-fold-uniform-memops.ll:1
+; RUN: opt -loop-vectorize -scalable-vectorization=off -force-vector-width=4 -prefer-predicate-over-epilogue=predicate-dont-vectorize -S < %s 2>&1 | FileCheck %s
+
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you are not checking any debug output, right? So there should be no need for `2>&1`.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D112619/new/

https://reviews.llvm.org/D112619