[PATCH] D112717: [IR] Replace *all* uses of a constant expression by corresponding instruction

[Mahesha S via Phabricator via llvm-commits]

hsmhsm marked an inline comment as done.
hsmhsm added inline comments.


================
Comment at: llvm/test/CodeGen/AMDGPU/lower-kernel-lds-constexpr.ll:129
+;
+  call void undef(i32 ptrtoint (i32* addrspacecast (i32 addrspace(3)* getelementptr inbounds ([4 x i32], [4 x i32] addrspace(3)* @lds.5, i32 0, i32 2) to i32*) to i32), i64 ptrtoint (i32* addrspacecast (i32 addrspace(3)* getelementptr inbounds ([4 x i32], [4 x i32] addrspace(3)* @lds.5, i32 0, i32 2) to i32*) to i64))
+  ret void
----------------
arsenm wrote:
> A more meaningful test that we can really codegen would be more helpful. Also this testcase could use a comment
Here is the more meaningful testcase - which stores self address.

WRONG OUTPUT WITHOUT THE PATCH:

```
  %1 = getelementptr inbounds [4 x i32], [4 x i32] addrspace(3)* getelementptr inbounds (%llvm.amdgcn.kernel.k6.lds.t, %llvm.amdgcn.kernel.k6.lds.t addrspace(3)* @llvm.amdgcn.kernel.k6.lds, i32 0, i32 0), i32 0, i32 2
  %2 = ptrtoint i32 addrspace(3)* %1 to i32
  store i32 %2, i32 addrspace(3)* getelementptr inbounds ([4 x i32], [4 x i32] addrspace(3)* @lds.5, i32 0, i32 2), align 4
  ret void
```

CORRECT OUTPUT WITH THE PATCH:

```
  %1 = getelementptr inbounds [4 x i32], [4 x i32] addrspace(3)* getelementptr inbounds (%llvm.amdgcn.kernel.k6.lds.t, %llvm.amdgcn.kernel.k6.lds.t addrspace(3)* @llvm.amdgcn.kernel.k6.lds, i32 0, i32 0), i32 0, i32 2
  %2 = ptrtoint i32 addrspace(3)* %1 to i32
  store i32 %2, i32 addrspace(3)* %1, align 8
  ret void
```

ALSO, THE GFX900 ISA FOR THE SAME:

```
; %bb.0:
        v_mov_b32_e32 v0, 8
        v_mov_b32_e32 v1, 0
        s_mov_b32 m0, -1
        ds_write_b32 v1, v0 offset:8
        s_endpgm
```


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D112717/new/

https://reviews.llvm.org/D112717