[llvm] e0ee027 - [InstCombine] regenerate test checks; NFC
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 29 09:22:50 PDT 2021
Author: Sanjay Patel
Date: 2021-10-29T12:22:34-04:00
New Revision: e0ee027a776f045739d41d3baf4ac3453ccd5d71
URL: https://github.com/llvm/llvm-project/commit/e0ee027a776f045739d41d3baf4ac3453ccd5d71
DIFF: https://github.com/llvm/llvm-project/commit/e0ee027a776f045739d41d3baf4ac3453ccd5d71.diff
LOG: [InstCombine] regenerate test checks; NFC
Added:
Modified:
llvm/test/Transforms/InstCombine/and-or.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/InstCombine/and-or.ll b/llvm/test/Transforms/InstCombine/and-or.ll
index fa8e158fb471..239080e5211c 100644
--- a/llvm/test/Transforms/InstCombine/and-or.ll
+++ b/llvm/test/Transforms/InstCombine/and-or.ll
@@ -1,56 +1,56 @@
-; NOTE: Assertions have been autogenerated by update_test_checks.py
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -instcombine -S | FileCheck %s
define i32 @func1(i32 %a, i32 %b) {
; CHECK-LABEL: @func1(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 %a, 1
-; CHECK-NEXT: [[TMP3:%.*]] = or i32 [[TMP1]], %b
-; CHECK-NEXT: ret i32 [[TMP3]]
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], 1
+; CHECK-NEXT: [[T3:%.*]] = or i32 [[TMP1]], [[B:%.*]]
+; CHECK-NEXT: ret i32 [[T3]]
;
- %tmp = or i32 %b, %a
- %tmp1 = and i32 %tmp, 1
- %tmp2 = and i32 %b, -2
- %tmp3 = or i32 %tmp1, %tmp2
- ret i32 %tmp3
+ %t = or i32 %b, %a
+ %t1 = and i32 %t, 1
+ %t2 = and i32 %b, -2
+ %t3 = or i32 %t1, %t2
+ ret i32 %t3
}
define i32 @func2(i32 %a, i32 %b) {
; CHECK-LABEL: @func2(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 %a, 1
-; CHECK-NEXT: [[TMP3:%.*]] = or i32 [[TMP1]], %b
-; CHECK-NEXT: ret i32 [[TMP3]]
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], 1
+; CHECK-NEXT: [[T3:%.*]] = or i32 [[TMP1]], [[B:%.*]]
+; CHECK-NEXT: ret i32 [[T3]]
;
- %tmp = or i32 %a, %b
- %tmp1 = and i32 1, %tmp
- %tmp2 = and i32 -2, %b
- %tmp3 = or i32 %tmp1, %tmp2
- ret i32 %tmp3
+ %t = or i32 %a, %b
+ %t1 = and i32 1, %t
+ %t2 = and i32 -2, %b
+ %t3 = or i32 %t1, %t2
+ ret i32 %t3
}
define i32 @func3(i32 %a, i32 %b) {
; CHECK-LABEL: @func3(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 %a, 1
-; CHECK-NEXT: [[TMP3:%.*]] = or i32 [[TMP1]], %b
-; CHECK-NEXT: ret i32 [[TMP3]]
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], 1
+; CHECK-NEXT: [[T3:%.*]] = or i32 [[TMP1]], [[B:%.*]]
+; CHECK-NEXT: ret i32 [[T3]]
;
- %tmp = or i32 %b, %a
- %tmp1 = and i32 %tmp, 1
- %tmp2 = and i32 %b, -2
- %tmp3 = or i32 %tmp2, %tmp1
- ret i32 %tmp3
+ %t = or i32 %b, %a
+ %t1 = and i32 %t, 1
+ %t2 = and i32 %b, -2
+ %t3 = or i32 %t2, %t1
+ ret i32 %t3
}
define i32 @func4(i32 %a, i32 %b) {
; CHECK-LABEL: @func4(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 %a, 1
-; CHECK-NEXT: [[TMP3:%.*]] = or i32 [[TMP1]], %b
-; CHECK-NEXT: ret i32 [[TMP3]]
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], 1
+; CHECK-NEXT: [[T3:%.*]] = or i32 [[TMP1]], [[B:%.*]]
+; CHECK-NEXT: ret i32 [[T3]]
;
- %tmp = or i32 %a, %b
- %tmp1 = and i32 1, %tmp
- %tmp2 = and i32 -2, %b
- %tmp3 = or i32 %tmp2, %tmp1
- ret i32 %tmp3
+ %t = or i32 %a, %b
+ %t1 = and i32 1, %t
+ %t2 = and i32 -2, %b
+ %t3 = or i32 %t2, %t1
+ ret i32 %t3
}
; Check variants of:
@@ -59,8 +59,8 @@ define i32 @func4(i32 %a, i32 %b) {
define i8 @and_or_hoist_mask(i8 %a, i8 %b) {
; CHECK-LABEL: @and_or_hoist_mask(
-; CHECK-NEXT: [[SH:%.*]] = lshr i8 %a, 6
-; CHECK-NEXT: [[B_MASKED:%.*]] = and i8 %b, 3
+; CHECK-NEXT: [[SH:%.*]] = lshr i8 [[A:%.*]], 6
+; CHECK-NEXT: [[B_MASKED:%.*]] = and i8 [[B:%.*]], 3
; CHECK-NEXT: [[AND:%.*]] = or i8 [[SH]], [[B_MASKED]]
; CHECK-NEXT: ret i8 [[AND]]
;
@@ -72,8 +72,8 @@ define i8 @and_or_hoist_mask(i8 %a, i8 %b) {
define <2 x i8> @and_xor_hoist_mask_vec_splat(<2 x i8> %a, <2 x i8> %b) {
; CHECK-LABEL: @and_xor_hoist_mask_vec_splat(
-; CHECK-NEXT: [[SH:%.*]] = lshr <2 x i8> %a, <i8 6, i8 6>
-; CHECK-NEXT: [[B_MASKED:%.*]] = and <2 x i8> %b, <i8 3, i8 3>
+; CHECK-NEXT: [[SH:%.*]] = lshr <2 x i8> [[A:%.*]], <i8 6, i8 6>
+; CHECK-NEXT: [[B_MASKED:%.*]] = and <2 x i8> [[B:%.*]], <i8 3, i8 3>
; CHECK-NEXT: [[AND:%.*]] = xor <2 x i8> [[SH]], [[B_MASKED]]
; CHECK-NEXT: ret <2 x i8> [[AND]]
;
@@ -85,8 +85,8 @@ define <2 x i8> @and_xor_hoist_mask_vec_splat(<2 x i8> %a, <2 x i8> %b) {
define i8 @and_xor_hoist_mask_commute(i8 %a, i8 %b) {
; CHECK-LABEL: @and_xor_hoist_mask_commute(
-; CHECK-NEXT: [[C:%.*]] = mul i8 %b, 43
-; CHECK-NEXT: [[SH:%.*]] = lshr i8 %a, 6
+; CHECK-NEXT: [[C:%.*]] = mul i8 [[B:%.*]], 43
+; CHECK-NEXT: [[SH:%.*]] = lshr i8 [[A:%.*]], 6
; CHECK-NEXT: [[C_MASKED:%.*]] = and i8 [[C]], 3
; CHECK-NEXT: [[AND:%.*]] = xor i8 [[C_MASKED]], [[SH]]
; CHECK-NEXT: ret i8 [[AND]]
@@ -100,8 +100,8 @@ define i8 @and_xor_hoist_mask_commute(i8 %a, i8 %b) {
define <2 x i8> @and_or_hoist_mask_commute_vec_splat(<2 x i8> %a, <2 x i8> %b) {
; CHECK-LABEL: @and_or_hoist_mask_commute_vec_splat(
-; CHECK-NEXT: [[C:%.*]] = mul <2 x i8> %b, <i8 43, i8 43>
-; CHECK-NEXT: [[SH:%.*]] = lshr <2 x i8> %a, <i8 6, i8 6>
+; CHECK-NEXT: [[C:%.*]] = mul <2 x i8> [[B:%.*]], <i8 43, i8 43>
+; CHECK-NEXT: [[SH:%.*]] = lshr <2 x i8> [[A:%.*]], <i8 6, i8 6>
; CHECK-NEXT: [[C_MASKED:%.*]] = and <2 x i8> [[C]], <i8 3, i8 3>
; CHECK-NEXT: [[AND:%.*]] = or <2 x i8> [[C_MASKED]], [[SH]]
; CHECK-NEXT: ret <2 x i8> [[AND]]
@@ -117,8 +117,8 @@ define <2 x i8> @and_or_hoist_mask_commute_vec_splat(<2 x i8> %a, <2 x i8> %b) {
define i8 @and_or_do_not_hoist_mask(i8 %a, i8 %b) {
; CHECK-LABEL: @and_or_do_not_hoist_mask(
-; CHECK-NEXT: [[SH:%.*]] = lshr i8 %a, 6
-; CHECK-NEXT: [[OR:%.*]] = or i8 [[SH]], %b
+; CHECK-NEXT: [[SH:%.*]] = lshr i8 [[A:%.*]], 6
+; CHECK-NEXT: [[OR:%.*]] = or i8 [[SH]], [[B:%.*]]
; CHECK-NEXT: [[AND:%.*]] = and i8 [[OR]], 3
; CHECK-NEXT: [[EXTRA_USE_OF_OR:%.*]] = mul i8 [[OR]], [[AND]]
; CHECK-NEXT: ret i8 [[EXTRA_USE_OF_OR]]
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