[PATCH] D112762: [RISCV] Teach RISCVInsertVSETVLI::needVSETVLI to handle mask register instructions better.

Fraser Cormack via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Oct 29 03:52:02 PDT 2021


frasercrmck accepted this revision.
frasercrmck added a comment.
This revision is now accepted and ready to land.
Herald added a subscriber: luke957.

LGTM, cheers


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D112762/new/

https://reviews.llvm.org/D112762



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