[PATCH] D112733: [AMDGPU] Fix cvt_f32_ubyte combine with shl

[Vang Thao via Phabricator via llvm-commits]

vangthao created this revision.
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Shift node is still needed to check if the shift is shr or shl to increment/decrement offset. Do not override the node.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D112733

Files:
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
  llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte_vector.ll

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