[llvm] 8daf769 - [Test] Regenerate some of llc test checks using auto updater
Max Kazantsev via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 28 02:19:13 PDT 2021
Author: Max Kazantsev
Date: 2021-10-28T16:18:30+07:00
New Revision: 8daf76935d30dae1a1bfd470ee73a83498d8adc5
URL: https://github.com/llvm/llvm-project/commit/8daf76935d30dae1a1bfd470ee73a83498d8adc5
DIFF: https://github.com/llvm/llvm-project/commit/8daf76935d30dae1a1bfd470ee73a83498d8adc5.diff
LOG: [Test] Regenerate some of llc test checks using auto updater
Added:
Modified:
llvm/test/CodeGen/AArch64/cmp-frameindex.ll
llvm/test/CodeGen/AArch64/large-stack-cmp.ll
llvm/test/CodeGen/AArch64/machine-sink-kill-flags.ll
llvm/test/CodeGen/ARM/no_redundant_trunc_for_cmp.ll
llvm/test/CodeGen/Hexagon/loop_correctness.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AArch64/cmp-frameindex.ll b/llvm/test/CodeGen/AArch64/cmp-frameindex.ll
index 2d01b76e186c4..03420fe2fc8f2 100644
--- a/llvm/test/CodeGen/AArch64/cmp-frameindex.ll
+++ b/llvm/test/CodeGen/AArch64/cmp-frameindex.ll
@@ -1,8 +1,19 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=aarch64 %s -o - | FileCheck %s
-; CHECK: test_frameindex_cmp:
-; CHECK: cmn sp, #{{[0-9]+}}
define void @test_frameindex_cmp() {
+; CHECK-LABEL: test_frameindex_cmp:
+; CHECK: // %bb.0:
+; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-NEXT: .cfi_def_cfa_offset 16
+; CHECK-NEXT: .cfi_offset w30, -16
+; CHECK-NEXT: cmn sp, #12
+; CHECK-NEXT: b.eq .LBB0_2
+; CHECK-NEXT: // %bb.1: // %bb1
+; CHECK-NEXT: bl bar
+; CHECK-NEXT: .LBB0_2: // %common.ret
+; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
+; CHECK-NEXT: ret
%stack = alloca i8
%stack.int = ptrtoint i8* %stack to i64
%cmp = icmp ne i64 %stack.int, 0
diff --git a/llvm/test/CodeGen/AArch64/large-stack-cmp.ll b/llvm/test/CodeGen/AArch64/large-stack-cmp.ll
index 68a76b79df930..3f5ff01b55afc 100644
--- a/llvm/test/CodeGen/AArch64/large-stack-cmp.ll
+++ b/llvm/test/CodeGen/AArch64/large-stack-cmp.ll
@@ -1,9 +1,32 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=arm64-apple-ios %s -o - | FileCheck %s
define void @foo() {
; CHECK-LABEL: foo:
-; CHECK: adds [[TMP:x[0-9]+]], sp,
-; CHECK: cmn [[TMP]],
+; CHECK: ; %bb.0:
+; CHECK-NEXT: stp x28, x27, [sp, #-32]! ; 16-byte Folded Spill
+; CHECK-NEXT: stp x29, x30, [sp, #16] ; 16-byte Folded Spill
+; CHECK-NEXT: sub sp, sp, #1, lsl #12 ; =4096
+; CHECK-NEXT: sub sp, sp, #80
+; CHECK-NEXT: .cfi_def_cfa_offset 4208
+; CHECK-NEXT: .cfi_offset w30, -8
+; CHECK-NEXT: .cfi_offset w29, -16
+; CHECK-NEXT: .cfi_offset w27, -24
+; CHECK-NEXT: .cfi_offset w28, -32
+; CHECK-NEXT: adds x8, sp, #1, lsl #12 ; =4096
+; CHECK-NEXT: cmn x8, #32
+; CHECK-NEXT: b.eq LBB0_2
+; CHECK-NEXT: ; %bb.1: ; %false
+; CHECK-NEXT: bl _baz
+; CHECK-NEXT: b LBB0_3
+; CHECK-NEXT: LBB0_2: ; %true
+; CHECK-NEXT: bl _bar
+; CHECK-NEXT: LBB0_3: ; %common.ret
+; CHECK-NEXT: add sp, sp, #1, lsl #12 ; =4096
+; CHECK-NEXT: add sp, sp, #80
+; CHECK-NEXT: ldp x29, x30, [sp, #16] ; 16-byte Folded Reload
+; CHECK-NEXT: ldp x28, x27, [sp], #32 ; 16-byte Folded Reload
+; CHECK-NEXT: ret
%var = alloca i32, i32 12
%var2 = alloca i32, i32 1030
diff --git a/llvm/test/CodeGen/AArch64/machine-sink-kill-flags.ll b/llvm/test/CodeGen/AArch64/machine-sink-kill-flags.ll
index 590e1692ef8b0..9315d1741574a 100644
--- a/llvm/test/CodeGen/AArch64/machine-sink-kill-flags.ll
+++ b/llvm/test/CodeGen/AArch64/machine-sink-kill-flags.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc %s -o - -fast-isel=true -O1 -verify-machineinstrs | FileCheck %s
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
@@ -8,10 +9,22 @@ target triple = "arm64-apple-ios8.0.0"
; The kill flags on the test had to be cleared because the AND was going to read
; registers in a BB after the test instruction.
-; CHECK: %bb343
-; CHECK: and
-
define i32 @test(i32* %ptr) {
+; CHECK-LABEL: test:
+; CHECK: ; %bb.0: ; %bb
+; CHECK-NEXT: mov x8, x0
+; CHECK-NEXT: mov w9, wzr
+; CHECK-NEXT: LBB0_1: ; %.thread
+; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: lsr w11, w9, #1
+; CHECK-NEXT: sub w10, w9, #1
+; CHECK-NEXT: mov w9, w11
+; CHECK-NEXT: tbnz w10, #0, LBB0_1
+; CHECK-NEXT: ; %bb.2: ; %bb343
+; CHECK-NEXT: and w9, w10, #0x1
+; CHECK-NEXT: mov w0, #-1
+; CHECK-NEXT: str w9, [x8]
+; CHECK-NEXT: ret
bb:
br label %.thread
diff --git a/llvm/test/CodeGen/ARM/no_redundant_trunc_for_cmp.ll b/llvm/test/CodeGen/ARM/no_redundant_trunc_for_cmp.ll
index 7146c09ee8096..64fd4f959169e 100644
--- a/llvm/test/CodeGen/ARM/no_redundant_trunc_for_cmp.ll
+++ b/llvm/test/CodeGen/ARM/no_redundant_trunc_for_cmp.ll
@@ -1,13 +1,18 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; This test check if redundant truncate for eq/ne cmp is skipped during code gen.
;RUN: llc -mtriple=thumbv7-eabi < %s | FileCheck %s
define void @test_zero(i16 signext %x) optsize {
-;CHECK-LABEL: test_zero
+; CHECK-LABEL: test_zero:
+; CHECK: @ %bb.0: @ %entry
+; CHECK-NEXT: cbz r0, .LBB0_2
+; CHECK-NEXT: @ %bb.1: @ %if.then
+; CHECK-NEXT: b foo1
+; CHECK-NEXT: .LBB0_2: @ %if.else
+; CHECK-NEXT: b foo2
entry:
%tobool = icmp eq i16 %x, 0
br i1 %tobool, label %if.else, label %if.then
-;CHECK-NOT: movw {{.*}}, #65535
-;CHECK: cbz r0,
if.then: ; preds = %entry
tail call void bitcast (void (...)* @foo1 to void ()*)()
br label %if.end
@@ -21,12 +26,16 @@ if.end: ; preds = %if.else, %if.then
}
define void @test_i8_nonzero(i18 signext %x) optsize {
-;CHECK-LABEL: test_i8_nonzero
+; CHECK-LABEL: test_i8_nonzero:
+; CHECK: @ %bb.0: @ %entry
+; CHECK-NEXT: cmp r0, #150
+; CHECK-NEXT: it eq
+; CHECK-NEXT: beq foo2
+; CHECK-NEXT: .LBB1_1: @ %if.then
+; CHECK-NEXT: b foo1
entry:
%tobool = icmp eq i18 %x, 150
br i1 %tobool, label %if.else, label %if.then
-;CHECK-NOT: bfc
-;CHECK: cmp r{{[0-9]+}}, #150
if.then: ; preds = %entry
tail call void bitcast (void (...)* @foo1 to void ()*)()
br label %if.end
@@ -40,13 +49,17 @@ if.end: ; preds = %if.else, %if.then
}
define void @test_i8_i16(i8 signext %x) optsize {
-;CHECK-LABEL: test_i8_i16
+; CHECK-LABEL: test_i8_i16:
+; CHECK: @ %bb.0: @ %entry
+; CHECK-NEXT: cmp.w r0, #300
+; CHECK-NEXT: it eq
+; CHECK-NEXT: beq foo2
+; CHECK-NEXT: .LBB2_1: @ %if.then
+; CHECK-NEXT: b foo1
entry:
%x16 = sext i8 %x to i16
%tobool = icmp eq i16 %x16, 300
br i1 %tobool, label %if.else, label %if.then
-;CHECK-NOT: uxth r0, r0
-;CHECK: cmp.w r0, #300
if.then: ; preds = %entry
tail call void bitcast (void (...)* @foo1 to void ()*)()
br label %if.end
@@ -60,10 +73,15 @@ if.end: ; preds = %if.else, %if.then
}
define void @test_i16_i8(i16 signext %x) optsize {
-;CHECK-LABEL: test_i16_i8
+; CHECK-LABEL: test_i16_i8:
+; CHECK: @ %bb.0: @ %entry
+; CHECK-NEXT: uxtb r0, r0
+; CHECK-NEXT: cmp r0, #128
+; CHECK-NEXT: it eq
+; CHECK-NEXT: beq foo2
+; CHECK-NEXT: .LBB3_1: @ %if.then
+; CHECK-NEXT: b foo1
entry:
-;CHECK: uxtb [[REG:r[0-9+]]], r0
-;CHECK: cmp [[REG]], #128
%x8 = trunc i16 %x to i8
%tobool = icmp eq i8 %x8, 128
br i1 %tobool, label %if.else, label %if.then
@@ -80,12 +98,16 @@ if.end: ; preds = %if.else, %if.then
}
define void @test_zext_zero(i16 zeroext %x) optsize {
-;CHECK-LABEL: test_zext_zero
+; CHECK-LABEL: test_zext_zero:
+; CHECK: @ %bb.0: @ %entry
+; CHECK-NEXT: cbz r0, .LBB4_2
+; CHECK-NEXT: @ %bb.1: @ %if.then
+; CHECK-NEXT: b foo1
+; CHECK-NEXT: .LBB4_2: @ %if.else
+; CHECK-NEXT: b foo2
entry:
%tobool = icmp eq i16 %x, 0
br i1 %tobool, label %if.else, label %if.then
-;CHECK-NOT: movw {{.*}}, #65535
-;CHECK: cbz r0,
if.then: ; preds = %entry
tail call void bitcast (void (...)* @foo1 to void ()*)()
br label %if.end
@@ -98,8 +120,5 @@ if.end: ; preds = %if.else, %if.then
ret void
}
-
declare void @foo1(...)
declare void @foo2(...)
-
-
diff --git a/llvm/test/CodeGen/Hexagon/loop_correctness.ll b/llvm/test/CodeGen/Hexagon/loop_correctness.ll
index efe74c03fa1f2..3efb8467f541d 100644
--- a/llvm/test/CodeGen/Hexagon/loop_correctness.ll
+++ b/llvm/test/CodeGen/Hexagon/loop_correctness.ll
@@ -1,9 +1,24 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -march=hexagon -O3 -hexagon-instsimplify=0 < %s | FileCheck %s
-; CHECK-LABEL: f0:
-; CHECK: loop0(.LBB{{[0-9]+}}_{{[0-9]+}},#3)
-; CHECK: endloop0
define void @f0(i8* nocapture %a0, i32 %a1, i32 %a2) #0 {
+; CHECK-LABEL: f0:
+; CHECK: // %bb.0: // %b0
+; CHECK-NEXT: {
+; CHECK-NEXT: loop0(.LBB0_1,#3)
+; CHECK-NEXT: }
+; CHECK-NEXT: .p2align 4
+; CHECK-NEXT: .Ltmp0: // Block address taken
+; CHECK-NEXT: .LBB0_1: // %b2
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: {
+; CHECK-NEXT: nop
+; CHECK-NEXT: nop
+; CHECK-NEXT: } :endloop0
+; CHECK-NEXT: // %bb.2: // %b3
+; CHECK-NEXT: {
+; CHECK-NEXT: jumpr r31
+; CHECK-NEXT: }
b0:
br label %b1
@@ -20,10 +35,24 @@ b3: ; preds = %b2
ret void
}
-; CHECK-LABEL: f1:
-; CHECK: loop0(.LBB{{[0-9]+}}_{{[0-9]+}},#2)
-; CHECK: endloop0
define void @f1(i8* nocapture %a0, i32 %a1, i32 %a2) #0 {
+; CHECK-LABEL: f1:
+; CHECK: // %bb.0: // %b0
+; CHECK-NEXT: {
+; CHECK-NEXT: loop0(.LBB1_1,#2)
+; CHECK-NEXT: }
+; CHECK-NEXT: .p2align 4
+; CHECK-NEXT: .Ltmp1: // Block address taken
+; CHECK-NEXT: .LBB1_1: // %b2
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: {
+; CHECK-NEXT: nop
+; CHECK-NEXT: nop
+; CHECK-NEXT: } :endloop0
+; CHECK-NEXT: // %bb.2: // %b3
+; CHECK-NEXT: {
+; CHECK-NEXT: jumpr r31
+; CHECK-NEXT: }
b0:
br label %b1
@@ -40,10 +69,24 @@ b3: ; preds = %b2
ret void
}
-; CHECK-LABEL: f2:
-; CHECK: loop0(.LBB{{[0-9]+}}_{{[0-9]+}},#1)
-; CHECK: endloop0
define void @f2(i8* nocapture %a0, i32 %a1, i32 %a2) #0 {
+; CHECK-LABEL: f2:
+; CHECK: // %bb.0: // %b0
+; CHECK-NEXT: {
+; CHECK-NEXT: loop0(.LBB2_1,#1)
+; CHECK-NEXT: }
+; CHECK-NEXT: .p2align 4
+; CHECK-NEXT: .Ltmp2: // Block address taken
+; CHECK-NEXT: .LBB2_1: // %b2
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: {
+; CHECK-NEXT: nop
+; CHECK-NEXT: nop
+; CHECK-NEXT: } :endloop0
+; CHECK-NEXT: // %bb.2: // %b3
+; CHECK-NEXT: {
+; CHECK-NEXT: jumpr r31
+; CHECK-NEXT: }
b0:
br label %b1
@@ -60,10 +103,24 @@ b3: ; preds = %b2
ret void
}
-; CHECK-LABEL: f3:
-; CHECK: loop0(.LBB{{[0-9]+}}_{{[0-9]+}},#4)
-; CHECK: endloop0
define void @f3(i8* nocapture %a0, i32 %a1, i32 %a2) #0 {
+; CHECK-LABEL: f3:
+; CHECK: // %bb.0: // %b0
+; CHECK-NEXT: {
+; CHECK-NEXT: loop0(.LBB3_1,#4)
+; CHECK-NEXT: }
+; CHECK-NEXT: .p2align 4
+; CHECK-NEXT: .Ltmp3: // Block address taken
+; CHECK-NEXT: .LBB3_1: // %b2
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: {
+; CHECK-NEXT: nop
+; CHECK-NEXT: nop
+; CHECK-NEXT: } :endloop0
+; CHECK-NEXT: // %bb.2: // %b3
+; CHECK-NEXT: {
+; CHECK-NEXT: jumpr r31
+; CHECK-NEXT: }
b0:
br label %b1
@@ -80,10 +137,24 @@ b3: ; preds = %b2
ret void
}
-; CHECK-LABEL: f4:
-; CHECK: loop0(.LBB{{[0-9]+}}_{{[0-9]+}},#2)
-; CHECK: endloop0
define void @f4(i8* nocapture %a0, i32 %a1, i32 %a2) #0 {
+; CHECK-LABEL: f4:
+; CHECK: // %bb.0: // %b0
+; CHECK-NEXT: {
+; CHECK-NEXT: loop0(.LBB4_1,#2)
+; CHECK-NEXT: }
+; CHECK-NEXT: .p2align 4
+; CHECK-NEXT: .Ltmp4: // Block address taken
+; CHECK-NEXT: .LBB4_1: // %b2
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: {
+; CHECK-NEXT: nop
+; CHECK-NEXT: nop
+; CHECK-NEXT: } :endloop0
+; CHECK-NEXT: // %bb.2: // %b3
+; CHECK-NEXT: {
+; CHECK-NEXT: jumpr r31
+; CHECK-NEXT: }
b0:
br label %b1
@@ -100,10 +171,24 @@ b3: ; preds = %b2
ret void
}
-; CHECK-LABEL: f5:
-; CHECK: loop0(.LBB{{[0-9]+}}_{{[0-9]+}},#2)
-; CHECK: endloop0
define void @f5(i8* nocapture %a0, i32 %a1, i32 %a2) #0 {
+; CHECK-LABEL: f5:
+; CHECK: // %bb.0: // %b0
+; CHECK-NEXT: {
+; CHECK-NEXT: loop0(.LBB5_1,#2)
+; CHECK-NEXT: }
+; CHECK-NEXT: .p2align 4
+; CHECK-NEXT: .Ltmp5: // Block address taken
+; CHECK-NEXT: .LBB5_1: // %b2
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: {
+; CHECK-NEXT: nop
+; CHECK-NEXT: nop
+; CHECK-NEXT: } :endloop0
+; CHECK-NEXT: // %bb.2: // %b3
+; CHECK-NEXT: {
+; CHECK-NEXT: jumpr r31
+; CHECK-NEXT: }
b0:
br label %b1
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