[PATCH] D108115: [DAG][sve] Lowering for VLS masked truncating stores

[Dave Green via Phabricator via llvm-commits]

dmgreen added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:18161
 
+  if (Store->isTruncatingStore()) {
+    Mask = DAG.getNode(
----------------
dmgreen wrote:
> Why do we need to extend the mask? So that convertFixedMaskToScalableVector shrinks to a i1 vector again?
@paulwalker-arm do the aarch64 portions of this patch look OK to you? If so I think the rest of this patch is fine.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108115/new/

https://reviews.llvm.org/D108115