[compiler-rt] 3d13ee2 - [ORC][ORC-RT] Enable the MachO platform for arm64
Ben Langmuir via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 27 13:36:48 PDT 2021
Author: Ben Langmuir
Date: 2021-10-27T13:36:03-07:00
New Revision: 3d13ee28914d88a839a57c54b1f7eeae6b0ef4ca
URL: https://github.com/llvm/llvm-project/commit/3d13ee28914d88a839a57c54b1f7eeae6b0ef4ca
DIFF: https://github.com/llvm/llvm-project/commit/3d13ee28914d88a839a57c54b1f7eeae6b0ef4ca.diff
LOG: [ORC][ORC-RT] Enable the MachO platform for arm64
Enables the arm64 MachO platform, adds basic tests, and implements the
missing TLV relocations and runtime wrapper function. The TLV
relocations are just handled as GOT accesses.
rdar://84671534
Differential Revision: https://reviews.llvm.org/D112656
Added:
compiler-rt/lib/orc/macho_tlv.arm64.S
compiler-rt/test/orc/TestCases/Darwin/arm64/lit.local.cfg.py
compiler-rt/test/orc/TestCases/Darwin/arm64/trivial-cxa-atexit.S
compiler-rt/test/orc/TestCases/Darwin/arm64/trivial-objc-methods.S
compiler-rt/test/orc/TestCases/Darwin/arm64/trivial-static-initializer.S
compiler-rt/test/orc/TestCases/Darwin/arm64/trivial-tlv.S
Modified:
compiler-rt/lib/orc/CMakeLists.txt
llvm/include/llvm/ExecutionEngine/JITLink/MachO_arm64.h
llvm/lib/ExecutionEngine/JITLink/MachO_arm64.cpp
llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
Removed:
################################################################################
diff --git a/compiler-rt/lib/orc/CMakeLists.txt b/compiler-rt/lib/orc/CMakeLists.txt
index cc57707a64799..c49f653dc992f 100644
--- a/compiler-rt/lib/orc/CMakeLists.txt
+++ b/compiler-rt/lib/orc/CMakeLists.txt
@@ -12,6 +12,7 @@ set(ORC_SOURCES
# Implementation files for all ORC architectures.
set(ALL_ORC_ASM_SOURCES
macho_tlv.x86-64.S
+ macho_tlv.arm64.S
elfnix_tls.x86-64.S
)
@@ -60,7 +61,10 @@ if (TARGET cxx-headers OR HAVE_LIBCXX)
endif()
if (APPLE)
- add_asm_sources(ORC_ASM_SOURCES macho_tlv.x86-64.S)
+ add_asm_sources(ORC_ASM_SOURCES
+ macho_tlv.x86-64.S
+ macho_tlv.arm64.S
+ )
add_compiler_rt_object_libraries(RTOrc
OS ${ORC_SUPPORTED_OS}
diff --git a/compiler-rt/lib/orc/macho_tlv.arm64.S b/compiler-rt/lib/orc/macho_tlv.arm64.S
new file mode 100644
index 0000000000000..f6eb9fc4da39a
--- /dev/null
+++ b/compiler-rt/lib/orc/macho_tlv.arm64.S
@@ -0,0 +1,92 @@
+//===-- macho_tlv.arm64.s ---------------------------------------*- ASM -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file is a part of the ORC runtime support library.
+//
+//===----------------------------------------------------------------------===//
+
+// The content of this file is arm64-only
+#if defined(__arm64__) || defined(__aarch64__)
+
+#define REGISTER_SAVE_SPACE_SIZE 32 * 24
+
+ .text
+
+ // returns address of TLV in x0, all other registers preserved
+ .globl ___orc_rt_macho_tlv_get_addr
+___orc_rt_macho_tlv_get_addr:
+ sub sp, sp, #REGISTER_SAVE_SPACE_SIZE
+ stp x29, x30, [sp, #16 * 1]
+ stp x27, x28, [sp, #16 * 2]
+ stp x25, x26, [sp, #16 * 3]
+ stp x23, x24, [sp, #16 * 4]
+ stp x21, x22, [sp, #16 * 5]
+ stp x19, x20, [sp, #16 * 6]
+ stp x17, x18, [sp, #16 * 7]
+ stp x15, x16, [sp, #16 * 8]
+ stp x13, x14, [sp, #16 * 9]
+ stp x11, x12, [sp, #16 * 10]
+ stp x9, x10, [sp, #16 * 11]
+ stp x7, x8, [sp, #16 * 12]
+ stp x5, x6, [sp, #16 * 13]
+ stp x3, x4, [sp, #16 * 14]
+ stp x1, x2, [sp, #16 * 15]
+ stp q30, q31, [sp, #32 * 8]
+ stp q28, q29, [sp, #32 * 9]
+ stp q26, q27, [sp, #32 * 10]
+ stp q24, q25, [sp, #32 * 11]
+ stp q22, q23, [sp, #32 * 12]
+ stp q20, q21, [sp, #32 * 13]
+ stp q18, q19, [sp, #32 * 14]
+ stp q16, q17, [sp, #32 * 15]
+ stp q14, q15, [sp, #32 * 16]
+ stp q12, q13, [sp, #32 * 17]
+ stp q10, q11, [sp, #32 * 18]
+ stp q8, q9, [sp, #32 * 19]
+ stp q6, q7, [sp, #32 * 20]
+ stp q4, q5, [sp, #32 * 21]
+ stp q2, q3, [sp, #32 * 22]
+ stp q0, q1, [sp, #32 * 23]
+
+ bl ___orc_rt_macho_tlv_get_addr_impl
+
+ ldp q0, q1, [sp, #32 * 23]
+ ldp q2, q3, [sp, #32 * 22]
+ ldp q4, q5, [sp, #32 * 21]
+ ldp q6, q7, [sp, #32 * 20]
+ ldp q8, q9, [sp, #32 * 19]
+ ldp q10, q11, [sp, #32 * 18]
+ ldp q12, q13, [sp, #32 * 17]
+ ldp q14, q15, [sp, #32 * 16]
+ ldp q16, q17, [sp, #32 * 15]
+ ldp q18, q19, [sp, #32 * 14]
+ ldp q20, q21, [sp, #32 * 13]
+ ldp q22, q23, [sp, #32 * 12]
+ ldp q24, q25, [sp, #32 * 11]
+ ldp q26, q27, [sp, #32 * 10]
+ ldp q28, q29, [sp, #32 * 9]
+ ldp q30, q31, [sp, #32 * 8]
+ ldp x1, x2, [sp, #16 * 15]
+ ldp x3, x4, [sp, #16 * 14]
+ ldp x5, x6, [sp, #16 * 13]
+ ldp x7, x8, [sp, #16 * 12]
+ ldp x9, x10, [sp, #16 * 11]
+ ldp x11, x12, [sp, #16 * 10]
+ ldp x13, x14, [sp, #16 * 9]
+ ldp x15, x16, [sp, #16 * 8]
+ ldp x17, x18, [sp, #16 * 7]
+ ldp x19, x20, [sp, #16 * 6]
+ ldp x21, x22, [sp, #16 * 5]
+ ldp x23, x24, [sp, #16 * 4]
+ ldp x25, x26, [sp, #16 * 3]
+ ldp x27, x28, [sp, #16 * 2]
+ ldp x29, x30, [sp, #16 * 1]
+ add sp, sp, #REGISTER_SAVE_SPACE_SIZE
+ ret
+
+#endif // defined(__arm64__) || defined(__aarch64__)
diff --git a/compiler-rt/test/orc/TestCases/Darwin/arm64/lit.local.cfg.py b/compiler-rt/test/orc/TestCases/Darwin/arm64/lit.local.cfg.py
new file mode 100644
index 0000000000000..a4b20fc5adf6e
--- /dev/null
+++ b/compiler-rt/test/orc/TestCases/Darwin/arm64/lit.local.cfg.py
@@ -0,0 +1,5 @@
+if config.root.host_arch not in ['aarch64', 'arm64']:
+ config.unsupported = True
+
+if config.target_arch not in ['aarch64', 'arm64']:
+ config.unsupported = True
\ No newline at end of file
diff --git a/compiler-rt/test/orc/TestCases/Darwin/arm64/trivial-cxa-atexit.S b/compiler-rt/test/orc/TestCases/Darwin/arm64/trivial-cxa-atexit.S
new file mode 100644
index 0000000000000..6c01c77f8588c
--- /dev/null
+++ b/compiler-rt/test/orc/TestCases/Darwin/arm64/trivial-cxa-atexit.S
@@ -0,0 +1,87 @@
+// Test that the runtime correctly interposes ___cxa_atexit.
+//
+// RUN: %clang -c -o %t %s
+// RUN: %llvm_jitlink %t
+
+ .section __TEXT,__text,regular,pure_instructions
+ .build_version macos, 12, 0 sdk_version 12, 0
+
+# main registers the atexit and sets the test result to one.
+ .globl _main ; -- Begin function main
+ .p2align 2
+_main: ; @main
+; %bb.0:
+ sub sp, sp, #32 ; =32
+ stp x29, x30, [sp, #16] ; 16-byte Folded Spill
+ add x29, sp, #16 ; =16
+ stur wzr, [x29, #-4]
+ adrp x8, __ZGVZ4mainE6onExit at PAGE
+ add x8, x8, __ZGVZ4mainE6onExit at PAGEOFF
+ ldarb w8, [x8]
+ and w8, w8, #0x1
+ and w8, w8, #0xff
+ cbnz w8, LBB0_3
+; %bb.1:
+ adrp x0, __ZGVZ4mainE6onExit at PAGE
+ add x0, x0, __ZGVZ4mainE6onExit at PAGEOFF
+ bl ___cxa_guard_acquire
+ cbz w0, LBB0_3
+; %bb.2:
+ adrp x0, __ZN6OnExitD1Ev at GOTPAGE
+ ldr x0, [x0, __ZN6OnExitD1Ev at GOTPAGEOFF]
+ adrp x1, __ZZ4mainE6onExit at PAGE
+ add x1, x1, __ZZ4mainE6onExit at PAGEOFF
+ adrp x2, ___dso_handle at PAGE
+ add x2, x2, ___dso_handle at PAGEOFF
+ bl ___cxa_atexit
+ adrp x0, __ZGVZ4mainE6onExit at PAGE
+ add x0, x0, __ZGVZ4mainE6onExit at PAGEOFF
+ bl ___cxa_guard_release
+LBB0_3:
+ mov x0, #1
+ bl _llvm_jitlink_setTestResultOverride
+ mov w0, #0
+ ldp x29, x30, [sp, #16] ; 16-byte Folded Reload
+ add sp, sp, #32 ; =32
+ ret
+ ; -- End function
+
+# OnExit destructor resets the test result override to zero.
+ .globl __ZN6OnExitD1Ev ; -- Begin function _ZN6OnExitD1Ev
+ .weak_def_can_be_hidden __ZN6OnExitD1Ev
+ .p2align 2
+__ZN6OnExitD1Ev: ; @_ZN6OnExitD1Ev
+; %bb.0:
+ sub sp, sp, #32 ; =32
+ stp x29, x30, [sp, #16] ; 16-byte Folded Spill
+ add x29, sp, #16 ; =16
+ str x0, [sp, #8]
+ ldr x0, [sp, #8]
+ str x0, [sp] ; 8-byte Folded Spill
+ bl __ZN6OnExitD2Ev
+ ldr x0, [sp] ; 8-byte Folded Reload
+ ldp x29, x30, [sp, #16] ; 16-byte Folded Reload
+ add sp, sp, #32 ; =32
+ ret
+ ; -- End function
+ .globl __ZN6OnExitD2Ev ; -- Begin function _ZN6OnExitD2Ev
+ .weak_def_can_be_hidden __ZN6OnExitD2Ev
+ .p2align 2
+__ZN6OnExitD2Ev: ; @_ZN6OnExitD2Ev
+; %bb.0:
+ sub sp, sp, #32 ; =32
+ stp x29, x30, [sp, #16] ; 16-byte Folded Spill
+ add x29, sp, #16 ; =16
+ str x0, [sp, #8]
+ ldr x8, [sp, #8]
+ str x8, [sp] ; 8-byte Folded Spill
+ mov x0, #0
+ bl _llvm_jitlink_setTestResultOverride
+ ldr x0, [sp] ; 8-byte Folded Reload
+ ldp x29, x30, [sp, #16] ; 16-byte Folded Reload
+ add sp, sp, #32 ; =32
+ ret
+ ; -- End function
+.zerofill __DATA,__bss,__ZZ4mainE6onExit,1,0 ; @_ZZ4mainE6onExit
+.zerofill __DATA,__bss,__ZGVZ4mainE6onExit,8,3 ; @_ZGVZ4mainE6onExit
+.subsections_via_symbols
diff --git a/compiler-rt/test/orc/TestCases/Darwin/arm64/trivial-objc-methods.S b/compiler-rt/test/orc/TestCases/Darwin/arm64/trivial-objc-methods.S
new file mode 100644
index 0000000000000..6c681efc6d803
--- /dev/null
+++ b/compiler-rt/test/orc/TestCases/Darwin/arm64/trivial-objc-methods.S
@@ -0,0 +1,186 @@
+// RUN: %clang -c -o %t %s
+// RUN: %llvm_jitlink -dlopen libobjc.A.dylib %t
+//
+// Test that Objective-C class and instance methods work.
+
+ .section __TEXT,__text,regular,pure_instructions
+ .build_version macos, 12, 0 sdk_version 12, 0
+ .p2align 2 ; -- Begin function +[ZeroGen classZero]
+"+[ZeroGen classZero]": ; @"\01+[ZeroGen classZero]"
+ .cfi_startproc
+; %bb.0:
+ sub sp, sp, #16 ; =16
+ .cfi_def_cfa_offset 16
+ str x0, [sp, #8]
+ str x1, [sp]
+ mov w0, #0
+ add sp, sp, #16 ; =16
+ ret
+ .cfi_endproc
+ ; -- End function
+ .p2align 2 ; -- Begin function -[ZeroGen objZero]
+"-[ZeroGen objZero]": ; @"\01-[ZeroGen objZero]"
+ .cfi_startproc
+; %bb.0:
+ sub sp, sp, #16 ; =16
+ .cfi_def_cfa_offset 16
+ str x0, [sp, #8]
+ str x1, [sp]
+ mov w0, #0
+ add sp, sp, #16 ; =16
+ ret
+ .cfi_endproc
+ ; -- End function
+ .globl _main ; -- Begin function main
+ .p2align 2
+_main: ; @main
+ .cfi_startproc
+; %bb.0:
+ sub sp, sp, #48 ; =48
+ stp x29, x30, [sp, #32] ; 16-byte Folded Spill
+ add x29, sp, #32 ; =32
+ .cfi_def_cfa w29, 16
+ .cfi_offset w30, -8
+ .cfi_offset w29, -16
+ stur wzr, [x29, #-4]
+ adrp x8, _OBJC_CLASSLIST_REFERENCES_$_ at PAGE
+ str x8, [sp, #8] ; 8-byte Folded Spill
+ ldr x0, [x8, _OBJC_CLASSLIST_REFERENCES_$_ at PAGEOFF]
+ bl _objc_alloc_init
+ ldr x8, [sp, #8] ; 8-byte Folded Reload
+ str x0, [sp, #16]
+ ldr x0, [x8, _OBJC_CLASSLIST_REFERENCES_$_ at PAGEOFF]
+ adrp x8, _OBJC_SELECTOR_REFERENCES_ at PAGE
+ ldr x1, [x8, _OBJC_SELECTOR_REFERENCES_ at PAGEOFF]
+ bl _objc_msgSend
+ cbz w0, LBB2_2
+; %bb.1:
+ mov w8, #1
+ stur w8, [x29, #-4]
+ b LBB2_5
+LBB2_2:
+ ldr x0, [sp, #16]
+ adrp x8, _OBJC_SELECTOR_REFERENCES_.2 at PAGE
+ ldr x1, [x8, _OBJC_SELECTOR_REFERENCES_.2 at PAGEOFF]
+ bl _objc_msgSend
+ cbz w0, LBB2_4
+; %bb.3:
+ mov w8, #1
+ stur w8, [x29, #-4]
+ b LBB2_5
+LBB2_4:
+ stur wzr, [x29, #-4]
+LBB2_5:
+ ldur w0, [x29, #-4]
+ ldp x29, x30, [sp, #32] ; 16-byte Folded Reload
+ add sp, sp, #48 ; =48
+ ret
+ .cfi_endproc
+ ; -- End function
+ .section __TEXT,__objc_classname,cstring_literals
+l_OBJC_CLASS_NAME_: ; @OBJC_CLASS_NAME_
+ .asciz "ZeroGen"
+
+ .section __TEXT,__objc_methname,cstring_literals
+l_OBJC_METH_VAR_NAME_: ; @OBJC_METH_VAR_NAME_
+ .asciz "classZero"
+
+ .section __TEXT,__objc_methtype,cstring_literals
+l_OBJC_METH_VAR_TYPE_: ; @OBJC_METH_VAR_TYPE_
+ .asciz "i16 at 0:8"
+
+ .section __DATA,__objc_const
+ .p2align 3 ; @"_OBJC_$_CLASS_METHODS_ZeroGen"
+__OBJC_$_CLASS_METHODS_ZeroGen:
+ .long 24 ; 0x18
+ .long 1 ; 0x1
+ .quad l_OBJC_METH_VAR_NAME_
+ .quad l_OBJC_METH_VAR_TYPE_
+ .quad "+[ZeroGen classZero]"
+
+ .p2align 3 ; @"_OBJC_METACLASS_RO_$_ZeroGen"
+__OBJC_METACLASS_RO_$_ZeroGen:
+ .long 1 ; 0x1
+ .long 40 ; 0x28
+ .long 40 ; 0x28
+ .space 4
+ .quad 0
+ .quad l_OBJC_CLASS_NAME_
+ .quad __OBJC_$_CLASS_METHODS_ZeroGen
+ .quad 0
+ .quad 0
+ .quad 0
+ .quad 0
+
+ .section __DATA,__objc_data
+ .globl _OBJC_METACLASS_$_ZeroGen ; @"OBJC_METACLASS_$_ZeroGen"
+ .p2align 3
+_OBJC_METACLASS_$_ZeroGen:
+ .quad _OBJC_METACLASS_$_NSObject
+ .quad _OBJC_METACLASS_$_NSObject
+ .quad __objc_empty_cache
+ .quad 0
+ .quad __OBJC_METACLASS_RO_$_ZeroGen
+
+ .section __TEXT,__objc_methname,cstring_literals
+l_OBJC_METH_VAR_NAME_.1: ; @OBJC_METH_VAR_NAME_.1
+ .asciz "objZero"
+
+ .section __DATA,__objc_const
+ .p2align 3 ; @"_OBJC_$_INSTANCE_METHODS_ZeroGen"
+__OBJC_$_INSTANCE_METHODS_ZeroGen:
+ .long 24 ; 0x18
+ .long 1 ; 0x1
+ .quad l_OBJC_METH_VAR_NAME_.1
+ .quad l_OBJC_METH_VAR_TYPE_
+ .quad "-[ZeroGen objZero]"
+
+ .p2align 3 ; @"_OBJC_CLASS_RO_$_ZeroGen"
+__OBJC_CLASS_RO_$_ZeroGen:
+ .long 0 ; 0x0
+ .long 8 ; 0x8
+ .long 8 ; 0x8
+ .space 4
+ .quad 0
+ .quad l_OBJC_CLASS_NAME_
+ .quad __OBJC_$_INSTANCE_METHODS_ZeroGen
+ .quad 0
+ .quad 0
+ .quad 0
+ .quad 0
+
+ .section __DATA,__objc_data
+ .globl _OBJC_CLASS_$_ZeroGen ; @"OBJC_CLASS_$_ZeroGen"
+ .p2align 3
+_OBJC_CLASS_$_ZeroGen:
+ .quad _OBJC_METACLASS_$_ZeroGen
+ .quad _OBJC_CLASS_$_NSObject
+ .quad __objc_empty_cache
+ .quad 0
+ .quad __OBJC_CLASS_RO_$_ZeroGen
+
+ .section __DATA,__objc_classrefs,regular,no_dead_strip
+ .p2align 3 ; @"OBJC_CLASSLIST_REFERENCES_$_"
+_OBJC_CLASSLIST_REFERENCES_$_:
+ .quad _OBJC_CLASS_$_ZeroGen
+
+ .section __DATA,__objc_selrefs,literal_pointers,no_dead_strip
+ .p2align 3 ; @OBJC_SELECTOR_REFERENCES_
+_OBJC_SELECTOR_REFERENCES_:
+ .quad l_OBJC_METH_VAR_NAME_
+
+ .p2align 3 ; @OBJC_SELECTOR_REFERENCES_.2
+_OBJC_SELECTOR_REFERENCES_.2:
+ .quad l_OBJC_METH_VAR_NAME_.1
+
+ .section __DATA,__objc_classlist,regular,no_dead_strip
+ .p2align 3 ; @"OBJC_LABEL_CLASS_$"
+l_OBJC_LABEL_CLASS_$:
+ .quad _OBJC_CLASS_$_ZeroGen
+
+ .section __DATA,__objc_imageinfo,regular,no_dead_strip
+L_OBJC_IMAGE_INFO:
+ .long 0
+ .long 64
+
+.subsections_via_symbols
diff --git a/compiler-rt/test/orc/TestCases/Darwin/arm64/trivial-static-initializer.S b/compiler-rt/test/orc/TestCases/Darwin/arm64/trivial-static-initializer.S
new file mode 100644
index 0000000000000..021ad6311ed7f
--- /dev/null
+++ b/compiler-rt/test/orc/TestCases/Darwin/arm64/trivial-static-initializer.S
@@ -0,0 +1,44 @@
+// Test that basic MachO static initializers work. The main function in this
+// test returns the value of 'x', which is initially 1 in the data section,
+// and reset to 0 if the _static_init function is run. If the static initializer
+// does not run then main will return 1, causing the test to be treated as a
+// failure.
+//
+// RUN: %clang -c -o %t %s
+// RUN: %llvm_jitlink %t
+
+ .section __TEXT,__text,regular,pure_instructions
+ .build_version macos, 12, 0 sdk_version 12, 0
+
+# static initializer sets the value of 'x' to zero.
+ .globl _static_init
+ .p2align 2
+_static_init:
+ .cfi_startproc
+; %bb.0:
+ adrp x8, _x at PAGE
+ str wzr, [x8, _x at PAGEOFF]
+ ret
+ .cfi_endproc
+
+# main returns the value of 'x', which is defined as 1 in the data section..
+ .globl _main
+ .p2align 2
+_main:
+ sub sp, sp, #16
+ str wzr, [sp, #12]
+ adrp x8, _x at PAGE
+ ldr w0, [x8, _x at PAGEOFF]
+ add sp, sp, #16
+ ret
+
+ .section __DATA,__data
+ .globl _x
+ .p2align 2
+_x:
+ .long 1
+
+ .section __DATA,__mod_init_func,mod_init_funcs
+ .p2align 3
+ .quad _static_init
+.subsections_via_symbols
\ No newline at end of file
diff --git a/compiler-rt/test/orc/TestCases/Darwin/arm64/trivial-tlv.S b/compiler-rt/test/orc/TestCases/Darwin/arm64/trivial-tlv.S
new file mode 100644
index 0000000000000..f6445be8a1dbb
--- /dev/null
+++ b/compiler-rt/test/orc/TestCases/Darwin/arm64/trivial-tlv.S
@@ -0,0 +1,80 @@
+// Test that basic MachO TLVs work by adding together TLVs with values
+// 0, 1, and -1, and returning the result (0 for success). This setup
+// tests both zero-initialized (__thread_bss) and non-zero-initialized
+// (__thread_data) secitons.
+//
+// RUN: %clang -c -o %t %s
+// RUN: %llvm_jitlink %t
+
+ .section __TEXT,__text,regular,pure_instructions
+ .build_version macos, 12, 0 sdk_version 12, 0
+ .globl _main ; -- Begin function main
+ .p2align 2
+_main: ; @main
+ .cfi_startproc
+; %bb.0:
+ sub sp, sp, #32 ; =32
+ stp x29, x30, [sp, #16] ; 16-byte Folded Spill
+ add x29, sp, #16 ; =16
+ .cfi_def_cfa w29, 16
+ .cfi_offset w30, -8
+ .cfi_offset w29, -16
+ adrp x0, _x at TLVPPAGE
+ ldr x0, [x0, _x at TLVPPAGEOFF]
+ ldr x8, [x0]
+ blr x8
+ mov x8, x0
+ adrp x0, _y at TLVPPAGE
+ ldr x0, [x0, _y at TLVPPAGEOFF]
+ ldr x9, [x0]
+ blr x9
+ mov x9, x0
+ adrp x0, _z at TLVPPAGE
+ ldr x0, [x0, _z at TLVPPAGEOFF]
+ ldr x10, [x0]
+ blr x10
+ stur wzr, [x29, #-4]
+ ldr w8, [x8]
+ ldr w9, [x9]
+ add w8, w8, w9
+ ldr w9, [x0]
+ add w0, w8, w9
+ ldp x29, x30, [sp, #16] ; 16-byte Folded Reload
+ add sp, sp, #32 ; =32
+ ret
+ .cfi_endproc
+ ; -- End function
+.tbss _x$tlv$init, 4, 2 ; @x
+
+ .section __DATA,__thread_vars,thread_local_variables
+ .globl _x
+_x:
+ .quad __tlv_bootstrap
+ .quad 0
+ .quad _x$tlv$init
+
+ .section __DATA,__thread_data,thread_local_regular
+ .p2align 2 ; @y
+_y$tlv$init:
+ .long 4294967295 ; 0xffffffff
+
+ .section __DATA,__thread_vars,thread_local_variables
+ .globl _y
+_y:
+ .quad __tlv_bootstrap
+ .quad 0
+ .quad _y$tlv$init
+
+ .section __DATA,__thread_data,thread_local_regular
+ .p2align 2 ; @z
+_z$tlv$init:
+ .long 1 ; 0x1
+
+ .section __DATA,__thread_vars,thread_local_variables
+ .globl _z
+_z:
+ .quad __tlv_bootstrap
+ .quad 0
+ .quad _z$tlv$init
+
+.subsections_via_symbols
diff --git a/llvm/include/llvm/ExecutionEngine/JITLink/MachO_arm64.h b/llvm/include/llvm/ExecutionEngine/JITLink/MachO_arm64.h
index ecbc93e1467de..aee14c0d1fe5e 100644
--- a/llvm/include/llvm/ExecutionEngine/JITLink/MachO_arm64.h
+++ b/llvm/include/llvm/ExecutionEngine/JITLink/MachO_arm64.h
@@ -29,6 +29,8 @@ enum MachOARM64RelocationKind : Edge::Kind {
PageOffset12,
GOTPage21,
GOTPageOffset12,
+ TLVPage21,
+ TLVPageOffset12,
PointerToGOT,
PairedAddend,
LDRLiteral19,
diff --git a/llvm/lib/ExecutionEngine/JITLink/MachO_arm64.cpp b/llvm/lib/ExecutionEngine/JITLink/MachO_arm64.cpp
index af1d88333c859..9d1eb9468f819 100644
--- a/llvm/lib/ExecutionEngine/JITLink/MachO_arm64.cpp
+++ b/llvm/lib/ExecutionEngine/JITLink/MachO_arm64.cpp
@@ -81,6 +81,14 @@ class MachOLinkGraphBuilder_arm64 : public MachOLinkGraphBuilder {
if (!RI.r_pcrel && !RI.r_extern && RI.r_length == 2)
return PairedAddend;
break;
+ case MachO::ARM64_RELOC_TLVP_LOAD_PAGE21:
+ if (RI.r_pcrel && RI.r_extern && RI.r_length == 2)
+ return TLVPage21;
+ break;
+ case MachO::ARM64_RELOC_TLVP_LOAD_PAGEOFF12:
+ if (!RI.r_pcrel && RI.r_extern && RI.r_length == 2)
+ return TLVPageOffset12;
+ break;
}
return make_error<JITLinkError>(
@@ -324,6 +332,7 @@ class MachOLinkGraphBuilder_arm64 : public MachOLinkGraphBuilder {
break;
}
case Page21:
+ case TLVPage21:
case GOTPage21: {
if (auto TargetSymbolOrErr = findSymbolByIndex(RI.r_symbolnum))
TargetSymbol = TargetSymbolOrErr->GraphSymbol;
@@ -348,6 +357,7 @@ class MachOLinkGraphBuilder_arm64 : public MachOLinkGraphBuilder {
"encoded addend");
break;
}
+ case TLVPageOffset12:
case GOTPageOffset12: {
if (auto TargetSymbolOrErr = findSymbolByIndex(RI.r_symbolnum))
TargetSymbol = TargetSymbolOrErr->GraphSymbol;
@@ -414,6 +424,7 @@ class PerGraphGOTAndPLTStubsBuilder_MachO_arm64
bool isGOTEdgeToFix(Edge &E) const {
return E.getKind() == GOTPage21 || E.getKind() == GOTPageOffset12 ||
+ E.getKind() == TLVPage21 || E.getKind() == TLVPageOffset12 ||
E.getKind() == PointerToGOT;
}
@@ -425,7 +436,8 @@ class PerGraphGOTAndPLTStubsBuilder_MachO_arm64
}
void fixGOTEdge(Edge &E, Symbol &GOTEntry) {
- if (E.getKind() == GOTPage21 || E.getKind() == GOTPageOffset12) {
+ if (E.getKind() == GOTPage21 || E.getKind() == GOTPageOffset12 ||
+ E.getKind() == TLVPage21 || E.getKind() == TLVPageOffset12) {
// Update the target, but leave the edge addend as-is.
E.setTarget(GOTEntry);
} else if (E.getKind() == PointerToGOT) {
@@ -565,6 +577,7 @@ class MachOJITLinker_arm64 : public JITLinker<MachOJITLinker_arm64> {
break;
}
case Page21:
+ case TLVPage21:
case GOTPage21: {
assert((E.getKind() != GOTPage21 || E.getAddend() == 0) &&
"GOTPAGE21 with non-zero addend");
@@ -601,6 +614,7 @@ class MachOJITLinker_arm64 : public JITLinker<MachOJITLinker_arm64> {
*(ulittle32_t *)FixupPtr = FixedInstr;
break;
}
+ case TLVPageOffset12:
case GOTPageOffset12: {
assert(E.getAddend() == 0 && "GOTPAGEOF12 with non-zero addend");
@@ -714,6 +728,10 @@ const char *getMachOARM64RelocationKindName(Edge::Kind R) {
return "GOTPage21";
case GOTPageOffset12:
return "GOTPageOffset12";
+ case TLVPage21:
+ return "TLVPage21";
+ case TLVPageOffset12:
+ return "TLVPageOffset12";
case PointerToGOT:
return "PointerToGOT";
case PairedAddend:
diff --git a/llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp b/llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
index e34626297d12f..af245cdc274a1 100644
--- a/llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
+++ b/llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
@@ -268,6 +268,7 @@ bool MachOPlatform::isInitializerSection(StringRef SegName,
bool MachOPlatform::supportedTarget(const Triple &TT) {
switch (TT.getArch()) {
+ case Triple::aarch64:
case Triple::x86_64:
return true;
default:
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