[PATCH] D112599: [RISCV] Fix vm operand constraint to fit GCC's behavior
Kito Cheng via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 27 09:24:35 PDT 2021
kito-cheng added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:9851
+ DAG.getUNDEF(LargerEltTypeVT), Val,
+ DAG.getConstant(0, DL, Subtarget.getXLenVT()));
+ }
----------------
frasercrmck wrote:
> I realise you're copying this from the existing code but shouldn't we be using `DAG.getVectorIdxConstant(0, DL)` here?
I'll update what I updated part, and keep untouched for other `DAG.getConstant(0, DL, Subtarget.getXLenVT())`
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D112599/new/
https://reviews.llvm.org/D112599
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