[PATCH] D109368: [LV] Don't vectorize if we can prove RT + vector cost >= scalar cost.

[Dave Green via Phabricator via llvm-commits]

dmgreen added a comment.

In D109368#3085804 <https://reviews.llvm.org/D109368#3085804>, @lebedev.ri wrote:

> Reverse ping - thanks!
> I've mostly implemented interleaved load/store cost modelling for AVX2 (related D111460 <https://reviews.llvm.org/D111460> is left)
> since the original evaluation of this patch, so the effect this has may be different now.

Can we make it so that this code doesn't produce a umul_with_overflow if the step is 1?
https://github.com/llvm/llvm-project/blob/8e4c806ed5a481e4d2163c8330f3c3c024d61a36/llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp#L2501

(We may need to improve the costmodel for it under AArch64 too, but I've not looked into that quite yet. I'm not sure if @fhahn is planning anything like that either?)


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D109368/new/

https://reviews.llvm.org/D109368