[PATCH] D109052: [AMDGPU][GlobalISel] Fix waterfall loops

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp:1067
 
+  // Indirect calls can't be tail calls, because the address can be divergent.
+  if (Info.Callee.isReg())
----------------
Add a todo to check divergence info?


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Comment at: llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp:3137-3138
+    // ADJCALLSTACKUP.
+    unsigned FrameSetupOpcode = TII->getCallFrameSetupOpcode();
+    unsigned FrameDestroyOpcode = TII->getCallFrameDestroyOpcode();
+
----------------
It's OK to just hardcode the opcodes here


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Comment at: llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp:3169
+          Register Reg = Dst.getReg();
+          if (Reg.isPhysical() && PhysRegUses.count(Reg)) {
+            IsCopy = true;
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This makes me nervous about overlapping register tuples. Exact match on physical registers is rarely a good idea


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D109052/new/

https://reviews.llvm.org/D109052