[PATCH] D112395: [AMDGPU] Enable 48-bit mul in AMDGPUCodeGenPrepare.

[Abinav Puthan Purayil via Phabricator via llvm-commits]

abinavpp marked 5 inline comments as done.
abinavpp added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp:534
 
   if (ST->hasMulU24() && (LHSBits = numBitsUnsigned(LHS, Size)) <= 24 &&
       (RHSBits = numBitsUnsigned(RHS, Size)) <= 24) {
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foad wrote:
> Do all subtargets that have mul_u24 also have mulhi_u24, and the same for i24?
I guess so. We're doing the same thing in AMDGPUISelLowering.cpp. For amdgcn, I can see a corresponding 24-bit mulhi instruction for GFX6 and above. For r600, I can see that in HD6900 and Evergreen. I haven't looked at all the subtargets. The subtarget initialization should take care of this.


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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D112395/new/

https://reviews.llvm.org/D112395