[PATCH] D112206: [CSKY] First patch to construct codegen infra and generate first add instruction

Zixuan Wu via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Oct 26 04:06:04 PDT 2021


zixuan-wu added inline comments.


================
Comment at: llvm/lib/Target/CSKY/MCTargetDesc/CSKYBaseInfo.h:26
+// instruction info tracks. All definitions must match CSKYInstrFormats.td.
+namespace CSKYII {
+
----------------
rengolin wrote:
> zixuan-wu wrote:
> > rengolin wrote:
> > > What's the relation of this with `CSKYInstrInfo`?
> > > 
> > > How do other targets share that kind of stuff?
> > Sorry to can't understand what you mean. I think this comments are similar meaning as RISCVBaseInfo.h has.
> I see, I was comparing this to the Arm/x86 back-ends. Last time I worked on this level was too long ago, and there is precedent, so this should be fine. :)
It's some flags to distinguish instruction type such as addressing mode of instruction.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D112206/new/

https://reviews.llvm.org/D112206



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