[PATCH] D106265: [AArch64][SVE] Zero-overhead transfer between Neon and SVE registers

[Peter Waller via Phabricator via llvm-commits]

peterwaller-arm abandoned this revision.
peterwaller-arm added a comment.

Thanks everyone who helped with this.

Instead of the approach in this review, the new intent is to add intrinsics to the Arm C Language Extensions (ACLE) to directly allow the user to perform this conversion through an intrinsic which will directly resolve to insert/extract subvector.

The proposal for that can be found here: https://github.com/ARM-software/acle/pull/72


Repository:
  rG LLVM Github Monorepo

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https://reviews.llvm.org/D106265