[PATCH] D111497: m68k: Support bit shifts on 64-bit integers

Mon Oct 25 17:45:47 PDT 2021

ricky26 added a comment.

I'm still getting test failures with this updated patch.

  ******************** TEST 'LLVM :: CodeGen/M68k/Arith/bitwise.ll' FAILED ********************
  Script:
  --
  : 'RUN: at line 2';   /home/ricky26/Projects/OSS/m68k/llvm/build-relwithdebinfo/bin/llc < /home/ricky26/Projects/OSS/m68k/llvm/llvm/test/CodeGen/M68k/Arith/bitwise.ll -mtriple=m68k-linux -verify-machineinstrs | /home/ricky26/Projects/OSS/m68k/llvm/build-relwithdebinfo/bin/FileCheck /home/ricky26/Projects/OSS/m68k/llvm/llvm/test/CodeGen/M68k/Arith/bitwise.ll
  --
  Exit Code: 1

  Command Output (stderr):
  --
  llc: /home/ricky26/Projects/OSS/m68k/llvm/llvm/lib/Target/M68k/M68kInstrInfo.cpp:762: virtual void llvm::M68kInstrInfo::storeRegToStackSlot(llvm::MachineBasicBlock&, llvm::MachineBasicBlock::iterator, llvm::Register, bool, int, const llvm::TargetRegisterClass*, const llvm::TargetRegisterInfo*) const: Assertion `MF.getFrameInfo().getObjectSize(FrameIndex) == 4 && "Stack slot too small for store"' failed.
  PLEASE submit a bug report to https://bugs.llvm.org/ and include the crash backtrace.
  Stack dump:
  0.	Program arguments: /home/ricky26/Projects/OSS/m68k/llvm/build-relwithdebinfo/bin/llc -mtriple=m68k-linux -verify-machineinstrs
  1.	Running pass 'Function Pass Manager' on module '<stdin>'.
  2.	Running pass 'Greedy Register Allocator' on function '@lshr64'
  -snip-
   #8 0x0000556e49e37621 llvm::MachineFrameInfo::getObjectSize(int) const /home/ricky26/Projects/OSS/m68k/llvm/llvm/lib/Target/M68k/M68kInstrInfo.cpp:762:3
   #9 0x0000556e49e37621 llvm::M68kInstrInfo::storeRegToStackSlot(llvm::MachineBasicBlock&, llvm::MachineInstrBundleIterator<llvm::MachineInstr, false>, llvm::Register, bool, int, llvm::TargetRegisterClass const*, llvm::TargetRegisterInfo const*) const /home/ricky26/Projects/OSS/m68k/llvm/llvm/lib/Target/M68k/M68kInstrInfo.cpp:762:3
  #10 0x0000556e4a5c6de4 llvm::TargetInstrInfo::foldMemoryOperand(llvm::MachineInstr&, llvm::ArrayRef<unsigned int>, int, llvm::LiveIntervals*, llvm::VirtRegMap*) const /home/ricky26/Projects/OSS/m68k/llvm/llvm/lib/CodeGen/TargetInstrInfo.cpp:646:24

Debug logging:

  selectOrSplit CCRC:%12 [80r,288r:0)  0 at 80r weight:3.322368e-03 w=3.322368e-03
  hints: $ccr
  RS_Split Cascade 0
  Analyze counted 2 instrs in 2 blocks, through 2 blocks.
  Compact region bundles, v=2, none.
  Cost of isolating all blocks = 2.0
  $ccr    static = 1.0, v=2 no bundles.
  Inline spilling CCRC:%12 [80r,288r:0)  0 at 80r weight:3.322368e-03
  From original %12
  Merged spilled regs: SS#0 [80r,288r:0)  0 at x weight:0.000000e+00
  spillAroundUses %12

It looks like it's trying to spill the CCR, perhaps we can't handle smaller than 32-bit stack slots either? Ideally we shouldn't spill the CCR at all since it's not supported on the 68000, but that's a problem for later.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D111497/new/

https://reviews.llvm.org/D111497