[PATCH] D112394: [AMDGPU] Implement llvm.amdgcn.mulhi.[i,u]24 intrinsics.
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 25 07:40:34 PDT 2021
foad added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td:283
+def AMDGPUmulhi_u24_impl : SDNode<"AMDGPUISD::MULHI_U24", SDTIntBinOp,
[SDNPCommutative, SDNPAssociative]
>;
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Not your fault, but are these mulhi nodes really associative??
================
Comment at: llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mulhi.i24.ll:2
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck %s
+
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Can you add a -global-isel run line? Does it Just Work?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D112394/new/
https://reviews.llvm.org/D112394
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