[PATCH] D111223: [GlobalISel] Simplify RegBankSelect
Sebastian Neubauer via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 25 07:13:31 PDT 2021
sebastian-ne updated this revision to Diff 381984.
sebastian-ne marked an inline comment as done.
sebastian-ne added a comment.
The make_pointer_range worked, thanks
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D111223/new/
https://reviews.llvm.org/D111223
Files:
llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
Index: llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
===================================================================
--- llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
+++ llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
@@ -699,11 +699,11 @@
// Set a sensible insertion point so that subsequent calls to
// MIRBuilder.
MIRBuilder.setMBB(*MBB);
- for (MachineBasicBlock::iterator MII = MBB->begin(), End = MBB->end();
- MII != End;) {
- // MI might be invalidated by the assignment, so move the
- // iterator before hand.
- MachineInstr &MI = *MII++;
+ SmallVector<MachineInstr *> WorkList(
+ make_pointer_range(reverse(MBB->instrs())));
+
+ while (!WorkList.empty()) {
+ MachineInstr &MI = *WorkList.pop_back_val();
// Ignore target-specific post-isel instructions: they should use proper
// regclasses.
@@ -728,18 +728,6 @@
"unable to map instruction", MI);
return false;
}
-
- // It's possible the mapping changed control flow, and moved the following
- // instruction to a new block, so figure out the new parent.
- if (MII != End) {
- MachineBasicBlock *NextInstBB = MII->getParent();
- if (NextInstBB != MBB) {
- LLVM_DEBUG(dbgs() << "Instruction mapping changed control flow\n");
- MBB = NextInstBB;
- MIRBuilder.setMBB(*MBB);
- End = MBB->end();
- }
- }
}
}
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