[PATCH] D110865: X86InstrInfo: Optimize more combinations of SUB+CMP

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a comment.

SGTM, does anyone else have any comments?



================
Comment at: llvm/lib/Target/X86/X86InstrInfo.cpp:4329
+  if (SrcReg2.isPhysical())
+    return false;
   MachineInstr *SrcRegDef = MRI->getVRegDef(SrcReg);
----------------
worth moving this up, just after the switch()?


================
Comment at: llvm/lib/Target/X86/X86InstrInfo.cpp:4501
   // The instruction to be updated is either Sub or MI.
-  Sub = IsCmpZero ? MI : Sub;
+  assert(MI == nullptr || Sub == nullptr);
+  Sub = MI != nullptr ? MI : Sub;
----------------
assert message?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D110865/new/

https://reviews.llvm.org/D110865