[PATCH] D111637: [AMDGPU] Changes the AMDGPU_Gfx calling convention by making the SGPRs 4..29 callee-save. This is to avoid superfluous s_movs when executing amdgpu_gfx function calls as the callee is likely not going to change the argument values.

Sebastian Neubauer via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 25 03:08:05 PDT 2021


sebastian-ne added inline comments.


================
Comment at: llvm/test/CodeGen/AMDGPU/tail-call-amdgpu-gfx.ll:20-41
+; GCN-NEXT:    s_or_saveexec_b64 s[34:35], -1
+; GCN-NEXT:    buffer_store_dword v1, off, s[0:3], s32 ; 4-byte Folded Spill
+; GCN-NEXT:    s_mov_b64 exec, s[34:35]
+; GCN-NEXT:    v_writelane_b32 v1, s33, 1
+; GCN-NEXT:    s_mov_b32 s33, s32
+; GCN-NEXT:    s_addk_i32 s32, 0x400
+; GCN-NEXT:    v_writelane_b32 v1, s4, 0
----------------
tsymalla wrote:
> sebastian-ne wrote:
> > This diff does not look that good. My guess is this is because s33 is made caller-save but was callee-save before. Can you try if adding s[32:35] to the callee-save registers fixes that?
> Is this correct? I thought, s33 is one of the reserved registers.
> Could this output be related to the changed behavior of the script (e. g. the old revision of this test had some -NEXT lines missing)?
Yes, s33 is the frame pointer.

> Could this output be related to the changed behavior of the script (e. g. the old revision of this test had some -NEXT lines missing)?

No, -NEXT means the match *has* to be the next line relative to the check before, so there can be no lines missing in-between.
The changed behavior was the update_mir script that did not generate -NEXT lines for us before but does now. This test uses the update_llc script, which already emitted -NEXT checks.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D111637/new/

https://reviews.llvm.org/D111637



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