[PATCH] D110743: [AMDGPU] Allow rematerialization of SOP with virtual registers
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 20 02:24:26 PDT 2021
foad added a comment.
No objections from me.
================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:123
+ // rematerialization if there are virtual register uses. We allow this,
+ // therefor this method includes SOP instructions as well.
return !MI.hasImplicitDef() &&
----------------
"therefore"
================
Comment at: llvm/test/CodeGen/AMDGPU/remat-sop.mir:55
+# The liverange of %0 covers a point of rematerialization, source value is
+# availabe.
+---
----------------
"available"
================
Comment at: llvm/test/CodeGen/AMDGPU/remat-sop.mir:84
+# The liverange of %0 does not cover a point of rematerialization, source value is
+# unavailabe and we do not want to artificially extend the liverange.
+---
----------------
"unavailable"
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D110743/new/
https://reviews.llvm.org/D110743
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