[PATCH] D112377: [DAGCombiner] make matching bit-hack form of usubsat more flexible

[Sanjay Patel via Phabricator via llvm-commits]

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(i8 X ^ 128) & (i8 X s>> 7) --> usubsat X, 128

As suggested in D112085 <https://reviews.llvm.org/D112085>, we can substitute 'xor' with 'add' in this pattern, and it is logically equivalent:
https://alive2.llvm.org/ce/z/eJtWWC

We canonicalize to 'xor' in IR, but SDAG does not do that (and it should not - https://llvm.org/PR52267 ), so it is possible to see either pattern in codegen. Note that 'sub' is a another potential pattern, but that is canonicalized to 'add' in DAGCombiner, so we don't need to worry about that variation.


https://reviews.llvm.org/D112377

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/test/CodeGen/AMDGPU/usubsat.ll
  llvm/test/CodeGen/X86/psubus.ll

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