[llvm] 950f22a - [llvm]Inclusive language: replace master with main

[Quinn Pham via llvm-commits]

Author: Quinn Pham
Date: 2021-10-22T11:56:44-05:00
New Revision: 950f22a5e13cb71fa39417a6a774a09764f94b6c

URL: https://github.com/llvm/llvm-project/commit/950f22a5e13cb71fa39417a6a774a09764f94b6c
DIFF: https://github.com/llvm/llvm-project/commit/950f22a5e13cb71fa39417a6a774a09764f94b6c.diff

LOG: [llvm]Inclusive language: replace master with main

[NFC] This patch fixes a url in a testcase due to the renaming of the branch.

Added: 
    

Modified: 
    llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s352.ll

Removed: 
    


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diff  --git a/llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s352.ll b/llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s352.ll
index 6d7a6a200dd0..e9d8a5697a4c 100644
--- a/llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s352.ll
+++ b/llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s352.ll
@@ -4,7 +4,7 @@
 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
 
 ; This test is reduced from the TSVC evaluation of vectorizers:
-; https://github.com/llvm/llvm-test-suite/commits/master/MultiSource/Benchmarks/TSVC/LoopRerolling-flt/tsc.c
+; https://github.com/llvm/llvm-test-suite/commits/main/MultiSource/Benchmarks/TSVC/LoopRerolling-flt/tsc.c
 ; Two loads and an fmul are expected to be vectorized to <2 x float>.
 ; Otherwise, performance will suffer on Cortex-A53.
 ; See https://bugs.llvm.org/show_bug.cgi?id=36280 for more details.