[llvm] 74cd4de - [AMDGPU] Preserve deadness of vcc when shrinking instructions
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 22 06:22:29 PDT 2021
Author: Jay Foad
Date: 2021-10-22T14:22:24+01:00
New Revision: 74cd4dee20e85cb2b071283a5caa8f924539e1b1
URL: https://github.com/llvm/llvm-project/commit/74cd4dee20e85cb2b071283a5caa8f924539e1b1
DIFF: https://github.com/llvm/llvm-project/commit/74cd4dee20e85cb2b071283a5caa8f924539e1b1.diff
LOG: [AMDGPU] Preserve deadness of vcc when shrinking instructions
This doesn't have any effect on codegen now, but it might do in the
future if we shrink instructions before post-RA scheduling, which is
sensitive to live vs dead defs.
Differential Revision: https://reviews.llvm.org/D112305
Added:
Modified:
llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
llvm/test/CodeGen/AMDGPU/shrink-carry.mir
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp b/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
index 45dd57ea1be4..2942413e7944 100644
--- a/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
+++ b/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
@@ -810,6 +810,10 @@ bool SIShrinkInstructions::runOnMachineFunction(MachineFunction &MF) {
// Copy extra operands not present in the instruction definition.
copyExtraImplicitOps(*Inst32, MF, MI);
+ // Copy deadness from the old explicit vcc def to the new implicit def.
+ if (SDst && SDst->isDead())
+ Inst32->findRegisterDefOperand(VCCReg)->setIsDead();
+
MI.eraseFromParent();
foldImmediates(*Inst32, TII, MRI);
diff --git a/llvm/test/CodeGen/AMDGPU/shrink-carry.mir b/llvm/test/CodeGen/AMDGPU/shrink-carry.mir
index 74b81d8d29a3..cb48912a1c06 100644
--- a/llvm/test/CodeGen/AMDGPU/shrink-carry.mir
+++ b/llvm/test/CodeGen/AMDGPU/shrink-carry.mir
@@ -1,7 +1,7 @@
# RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -start-before si-shrink-instructions -stop-before si-late-branch-lowering -o - %s | FileCheck -check-prefix=GCN %s
# GCN-LABEL: name: subbrev{{$}}
-# GCN: V_SUBBREV_U32_e32 0, undef $vgpr0, implicit-def $vcc, implicit killed $vcc, implicit $exec
+# GCN: V_SUBBREV_U32_e32 0, undef $vgpr0, implicit-def dead $vcc, implicit killed $vcc, implicit $exec
---
name: subbrev
@@ -26,7 +26,7 @@ body: |
...
# GCN-LABEL: name: subb{{$}}
-# GCN: V_SUBBREV_U32_e32 0, undef $vgpr0, implicit-def $vcc, implicit killed $vcc, implicit $exec
+# GCN: V_SUBBREV_U32_e32 0, undef $vgpr0, implicit-def dead $vcc, implicit killed $vcc, implicit $exec
---
name: subb
@@ -51,7 +51,7 @@ body: |
...
# GCN-LABEL: name: addc{{$}}
-# GCN: V_ADDC_U32_e32 0, undef $vgpr0, implicit-def $vcc, implicit killed $vcc, implicit $exec
+# GCN: V_ADDC_U32_e32 0, undef $vgpr0, implicit-def dead $vcc, implicit killed $vcc, implicit $exec
---
name: addc
@@ -76,7 +76,7 @@ body: |
...
# GCN-LABEL: name: addc2{{$}}
-# GCN: V_ADDC_U32_e32 0, undef $vgpr0, implicit-def $vcc, implicit killed $vcc, implicit $exec
+# GCN: V_ADDC_U32_e32 0, undef $vgpr0, implicit-def dead $vcc, implicit killed $vcc, implicit $exec
---
name: addc2
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